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Interrupt/IQR MC68HC

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Hey guys, how are you?
I'm programming an old 68HC11; i was reading a chapter related to interrupts and i got stuck in 2 "suggested" exercises.
Who can help me with some assembly code?. This topic is kinda tricky to me and everything seems a little complicated.

Thanks


EDIT:


I can think of 1 or 2 ways to solve it by using C or even C++; i'm using THRSim11 and it seems really complicated. I need a 68HC11 hero. Who's willing to help me?
 

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The initial question re. interrupt handling has no real correlation to the problem in the added image - that can be done completely with a simple loop:
Read the temperature, compare to the target, switch heat, cool or both off as appropriate & repeat.


This is an example of an HC11 interrupt routine, in assembly.
In essence just a subroutine, with any registers you use in that routine saved at the start and restored at the end, so whatever they were being used for at the instant the interrupt occurs is not affected.

Code:
                        * Interrupt driven serial data input
                        *
C848 36                 COMMSINT psha
C849 3C                          pshx
C84A B6 80 2E           COMMSIN2 lda    REG+SCSR    Get serial stat reg.
C84D 85 28                       bita   #$28        RX Data ready?
C84F 27 14                       beq    commsend
                        *
C851 B6 80 2F           commsrx  ldaa   REG+SCDR    Get rx data reg
C854 DE 84                       ldx    rxbinp    
C856 A7 00                       sta    0,x
C858 08                          inx
C859 8C 60 00                    cmpx   #RXBuffer+$1000 At end of buff??
C85C 26 03                       bne    commsrx2
C85E CE 50 00                    ldx    #RXBuffer
C861 DF 84              commsrx2 stx    rxbinp
                        *
C863 20 E5                       bra    COMMSIN2    loop back for any more
                        *
C865 38                 commsend pulx
C866 32                          pula
C867 3B                          rti
                        *

You also need to define the vector table, the addresses of the reset (start up) program and any interrupt routines used, eg.

Code:
                        * Interrupt vectors
                        *
FFC0                             org $FFC0
FFC0 C9 59                       fdb dummyint Reserved              FFC0
FFC2 C9 59                       fdb dummyint Reserved              FFC2
FFC4 C9 59                       fdb dummyint Reserved              FFC4
FFC6 C9 59                       fdb dummyint Reserved              FFC6
FFC8 C9 59                       fdb dummyint Reserved              FFC8
FFCA C9 59                       fdb dummyint Reserved              FFCA
FFCC C9 59                       fdb dummyint Reserved              FFCC
FFCE C9 59                       fdb dummyint Reserved              FFCE
FFD0 C9 59                       fdb dummyint Reserved              FFD0
FFD2 C9 59                       fdb dummyint Reserved              FFD2
FFD4 C9 59                       fdb dummyint Reserved              FFD4  
FFD6 C8 48                       fdb COMMSINT SCI int.              FFD6
FFD8 C9 59                       fdb dummyint SPI int.              FFD8
FFDA C9 59                       fdb dummyint Pulse Acc input       FFDA
FFDC C9 59                       fdb dummyint Pulse Acc overflow    FFDC
FFDE C9 59                       fdb dummyint Timer overflow        FFDE
FFE0 C9 59                       fdb dummyint Output Compare 5:     FFE0
FFE2 C9 59                       fdb dummyint Output compare 4:     FFE2
FFE4 C9 59                       fdb dummyint Output compare 3:     FFE4
FFE6 C8 68                       fdb DISPINT  Output Compare 2:     FFE6
FFE8 C8 87                       fdb TIMERINT Output compare 1:     FFE8
FFEA C9 59                       fdb dummyint Input Capture #3:     FFEA
FFEC C9 59                       fdb dummyint Input Capture #2:     FFEC
FFEE C9 59                       fdb dummyint Input Capture #1:     FFEE
FFF0 C9 59                       fdb dummyint Real Time interrupt   FFF0
FFF2 C9 59                       fdb dummyint IRQ                   FFF2
FFF4 C9 59                       fdb dummyint XIRQ                  FFF4
FFF6 C9 59                       fdb dummyint SWI                   FFF6
FFF8 C9 59                       fdb dummyint Illegal Opcode        FFF8
FFFA C9 59                       fdb dummyint COP fail              FFFA
FFFC C9 59                       fdb dummyint Clock Monitor         FFFC
FFFE C0 00                       fdb RESET                          FFFE
                        *
                        *
                                 END
 
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