I think there are two major categories to this.
Standard clocked synchronous circuits should behave the same whatever you might do with the rest of the cells, as long as you abide timing constraints from the manufacturer.
Asynchronous circuits with feedback like ring oscillators, metastable random number generators etc., and especially those that are on the edge or straight violating timing constraints of the cells will likely be affected by anything that might be present in the rest of the chip, but also by any stray electric and magnetic fields and noise on power lines from other neighboring chips.