Ripple and load regulation have everything to do with
impedance ratio for DC or some Z(f) with f ripple where values of ESR in the Cap can be important to know as well as the ESR in the power source.
Historical notes
ALVC2 ( corrected) comes after a long lineage when life was simple and all we had was '54/'74 '74S '74L '74LS '74F '74HC '40xx which included a migration from TTL to CMOS with pin compatibility. The prefix ' was generally the vendor code and we usually preferred Fairchild for speed and low impedance.
Then were improvements in speed and lower impedance drivers with more consistency between vendors. So the prefix didn't matter as much and SN74ALSxx became 'ALSxx... in abbreviated form.
Some offspring were 'HC 'AC 'AHCT 'ALS 'ALC 'ALVC
Which brings me to ALVC2 , which is what I meant not ALCV2
All the Atmel processors use this 'ALVC2' driver design which has a low voltage drop at rated current equivalent of a 25 Ohm ESR or RdsOn as it is , and both are N and P are chosen equal.
When CMOS came out, I have used it for Analog purposes with Buffered types having a gain of 1000 with stages of inversion or Unbuffered with 1 stage inverter or a gain of 10 so it could be used with negative feedback as a cheap and dirty self- biased AC amplifier.
I grew up as an Engineer, learning with the likes of R.A.Pease, J. Williams and Burr-Brown
and read every Design Note published and bound in our EE library before my grad. in '75 so I could design from their experiences and applied it to my 1st job in aerospace.
Tony
aka.a Sunnyskyguy
p.s. If you deviate from a published design, try to figure out the assumptions not stated in the parts specified like ESR in coils (Rs) , caps, transistors (RdsOn, Rce) and have good reason to change and understand the implications on bias. e.g. All transistors are rated Ic/Ib=10 because hFE no longer applies when saturated. Except Diodes Inc use a ratio of 20 to 50 because they figured out how to saturate with better performance and lower bias current by improving the Rce value. ( special doping and geometry)
Note that
https://electronicdesign.com/site-f...ctronicdesign.com/files/29/6388/figure_01.gif
does not state the critical Rs for L1 and RdsOn for Q1 as these are affect cost, current, load regulation, ripple and load specs which are user design parameters and are key parameters.
N.B. Always start with a good spec. then have a benchmark to test your design.
You can always change the spec, if it fails to meet your cost target or performance trade-off.