Lets say you had a 16 bit word.
lets say the 1st 8 bits is an OP code.
so lets define a few instructions:
Code:
Halt: 0000 0000 the 0000 is the OP code and the second 0000 is not used, but is the operand
NOP 0001 0000 No operation
TSTC test carry
TSTZ test zero - these don't have operands
Now let's say we had an instruction that if the zero flag is set branch; The second 0000 could be a +-relative branch, That's an operand.
Yep, stuff gets messy when you add relative and direct addressing of multiple registers.