Yeah, I knew I couldn't outpace the HC595... its blazingly fast.
Ok, so maybe I'm making the wrong assumptions and, therefore, seeking the wrong piece of information.... here is my situation:
I'm using the dsPIC to drive an array of LEDs. The goal is to have them light up in fanciful patterns and have the patterns alternate during a certain period (to a beat.. so like every 1/4 second). As such, I am using the serial-to-parallel to address each array element.
Since the serial-to-parallel is shift register-based, that means I have to clock in 8 bits, however fast, then, AFTER the last bit is clocked in and BEFORE the next bit is clocked in after that, I need to clock the external layer of registers to send the data out to the array (thereby, plucking the data off of the shift register and sending outward).
Now, my conundrum is getting the timings down for all of this. What would best practice be for this situation? I need one clock which is speed X and then another clock which is speed X/8. At the same time, I may need some kind of granular, manual method of, ultimately, sending in data and clocking it out (so I execute this 'refresh' function when I want to update the array pattern).
Related question: Being as I need to write the patterns to memory and I will be using up alot of cycles for math calculations, wouldn't it be inefficient/impossible to rely on a constant loop refresh that is continually feeding and latching the serial-to-parallel (therefore, requiring the implementation of a manual 'refresh' function)?
Any suggestions here?
Thanks for all who have followed along so far.