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Funny response from 74LS166

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pcbheaven.com

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Using this almost obsolete IC for a project, i came up to something rather strange. This has 8 paralel inputs that will be shifted into one serial output to each clock pulse.

Everything was going just fine, when once, one paralell input hat logic 0, but it was NOT connected to ground.

When working with CMOS or others, i always have a pull down resistor for example. But with TTL, unused inputs was considered to be HIGH, with no pull up resistor. Is this true? Or should i have always a pull up resistor?

But the funniest part comes now!!! I removed the TTL from the breadboard, kept it out for a minute or so, and then put it back again. And guess what. The same input had logic LOW but still not connected to ground. I gave it a HIGH for a seccond, and from then on it works just fine.

Can this be done?? Actually i CAN be done. But how can someone explain it?
 
An LS TTL input is the emitter of a transistor. A CMOS input is the gate of a FET, it neither sources nor sinks any appreciable current. If you ground an unused LS TTL input istwill source current to ground. That is why in TTL circuits you tie unused inputs high. When they float they can be either high or low, or they can be in the no mans land between the maximum low (0.8V typical) and the minimum high (2.0V Typical) When a TTL input is tied high or pulled up with a resistor there is no appreciable cuurent flow into or out of the emitter of the input stage.
 
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