Full Bridge Inverter Simulation

Status
Not open for further replies.
M

Maverickmax

New Member
Hi

I have been using a SIMetrix simulation for conducting investigation on a simple full bridge inverter. I expect the waveform to be bipolar but I keep getting the unipolar waveform as shown below. I am aware that voltage waveform should be bipolar but it is not happening on my simulation. Please tell where did I go wrong?

Regards

MM
 

Attachments

  • FullBridge_Analysis,jpg.png
    5.9 KB · Views: 2,771
  • FullBridge_Analysis_3-graph.jpg
    94.9 KB · Views: 1,800
Last edited:
Can't tell without more info. What are the voltage output levels and timing of V2 through V4?
 
crutschow said:
Can't tell without more info. What are the voltage output levels and timing of V2 through V4?
Click to expand...

PWM - 1kHz
Voltage - 200V
Voltage input to each MOSFET - 5V (Offset - 2.5V)
Duty Cycle = 50%
Rise Time = 0 (On every MOSFET)
Fall Time = 0 (On every MOSFET)

Q1 and Q4 - Inverted Square waveform
Q2 and Q3 - Non-inverted Square waveform
 
Last edited:
You cannot drive the gates of upper two FETs WITH RESPECT TO GROUND unless V4 and V5 are +205V!!! (Not a practical way to do it). They have to be driven with respect to their own Sources. Your basic H bridge is not correct.
 
Last edited:
Remember it's the gate-to-source voltage that controlls the transistor, not the gate to ground voltage (unless the source is connected to ground).
 
MikeMl said:
You cannot drive the gates of upper two FETs WITH RESPECT TO GROUND unless V4 and V5 are +205V!!! (Not a practical way to do it). They have to be driven with respect to their own Sources. Your basic H bridge is not correct.
Click to expand...

Please advise me how to proceed it in the correct way?

MM
 
Maverickmax said:
Please advise me how to proceed it in the correct way?

MM
Click to expand...
Replace the top two NFETs with PFETs (sources connected to +200V) , and drive the gates of the PFets downward from +200V.
 
Last edited:
Its a trade off!! You can use 4 NFETs and have a horribly-complicated Gate driver for the top two, or you can use PFETs for the top two devices and have a simpler gate driver for the top two; or you can use split -100V and +100V supplies, and have the simplest gate driver...
 
You could also use a pulse transformer to control the high side but it will only work for AC voltages and there can't be any net DC e.g. the duty cycle needs to be 50%.
 
Hero999 said:
You could also use a pulse transformer to control the high side but it will only work for AC voltages and there can't be any net DC e.g. the duty cycle needs to be 50%.
Click to expand...
That's true for a DC coupled circuit. But you can use any duty cycle with a transformer if you couple the signal through a series capacitor to keep the average dc current at zero. Of course, the DC level signal at the transformer output will be at whatever is the average value of the signal waveform. From that you likely can use a clamp circuit to restore the DC level to whatever you need.
 
That's sort of true.

The problem is with a very high duty cycle the voltage will be much lower because as you've said the average value has to be zero.
 
Status
Not open for further replies.

Similar threads

A
TL072 and Non-inverter small signal amplifying
2 3
Replies
43
Views
5K
arvinfx
A
C
  • Question
Simulation Help for Axial Flux PMG with Ansoft Maxwell 3D
Replies
2
Views
424
rjenkinsgb
V
  • Question
Analog or gate
Replies
3
Views
815
Tony Stewart
E
  • Question
H-bridge driver board with input for direction
Replies
4
Views
2K
Erhy
E
H
  • Article
Precision Voltage-to-Frequency Converter,100 kHz Full-Scale, ±0.03% Non-Linearity
Replies
14
Views
2K
Lightium
Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…