but I don't know how to do the DC analysis in part(b), can someone help me with that?
And to determine the open loop transconductance at mid-band frequencies, I have drawn a small signal equivalent circuit (open loop), can someone just check whether it is correct?
but I don't know how to do the part(b) in the question, which is find out the Io and Gate voltage.
And also I draw a small signal model to determine the open loop transconductance at mid-band frequencies, please see the third attached file. Is it correct?
Your small signal model "AVid" is drawn like a dependent current source when really it should be a dependent voltage source. You'll have to change that.
Your small signal model "AVid" is drawn like a dependent current source when really it should be a dependent voltage source. You'll have to change that.
yes, that should be a dependent voltage source. I didn't draw it correctly.
Is there any problem with this small signal model? If I want to use it to calculate the open loop transconductance at mid-band frequencies?
And also, how to solve part(b)? find the Io and gate voltage?
Ok, well if you knew what gm was you would use that to calculate Io, but if you dont then you have to look up the model for the FET to find out what Id is with gate voltage. I can check around if i have a model like this but it's been a long time since i needed that so im not sure if i can find it or not. It will relate V^2 to the drain current something like I=A*(Vg-Vt)^2, where A=1/250ua. It's been quite a while though so that may not be the exact expression.
Sorry i cant be a little more specific with this right now, but i'm also dealing with some browser hijacking that im trying to get rid of. I think i'll ask around about that here too.