T1CON=0b00000000;
uint32 var32=0x9C40000;
uint16 var16=0x1F4;
TMR1=0;
TMR1ON=1;
var32/=var16;
TMR1ON=0;
Nope... I had tried to implement really fast division, but even the boffs at XC8 headquarters use ASM..Ian Rogers, fancy trying the above with optimization?
/*** Unsigned Integer Division: 32-bit by 32-bit
***
*** Optimized: Dec. 21, 2000
*** by: Daniel R. Madill, Quanser Consulting Inc.
*** for: Saved (for the worst case) at least 8*32 = 256 instruction cycles
*** over the code supplied with MCC18 v1.00.12
***/
void FXD3232U(void/* ulong aarg, ulong barg */)
{
// use INDF1 for the counter...
_asm
// REM = 0
clrf __REMB0, 0
clrf __REMB1, 0
clrf __REMB2, 0
clrf __REMB3, 0
// INDF1 = 32
movlw 32
movwf INDF1, 0
// Clear the carry
bcf STATUS, 0, 0
loop:
//AARG32 <<= 1; The carry is always clear at the top of the loop.
rlcf __AARGB3, 1, 0
rlcf __AARGB2, 1, 0
rlcf __AARGB1, 1, 0
rlcf __AARGB0, 1, 0
//REM32 = (REM32 << 1) | (AARG32 >> 32)
rlcf __REMB3, 1, 0
rlcf __REMB2, 1, 0
rlcf __REMB1, 1, 0
rlcf __REMB0, 1, 0
//if (PROD >= BARG32)
movf __BARGB3, 0, 0
subwf __REMB3, 0, 0
movf __BARGB2, 0, 0
subwfb __REMB2, 0, 0
movf __BARGB1, 0, 0
subwfb __REMB1, 0, 0
movf __BARGB0, 0, 0
subwfb __REMB0, 0, 0
bnc _false
//{
//REM32-= BARG32;
movf __BARGB3, 0, 0
subwf __REMB3, 1, 0
movf __BARGB2, 0, 0
subwfb __REMB2, 1, 0
movf __BARGB1, 0, 0
subwfb __REMB1, 1, 0
movf __BARGB0, 0, 0
subwfb __REMB0, 1, 0
//++AARG32; Since AARG32 was shift to the left above, we only need to set
// the lowest bit. Use incf so that the carry flag will also be cleared.
// Thus, the carry will always be clear at the top of the loop.
incf __AARGB3, 1, 0
//}
_false:
decfsz INDF1, 1, 0 // does not affect the carry bit
bra loop
/* result in AARG already... */
_endasm
}
Easily adapted to 16F. Needed to add: bcf STATUS,0 after "incf __AARGB3, 1, 0" because incf doesn't affect carry bit in the 16F processors. Also got rid of the bnc, which is a pseudo instruction for 16F's (added a Tcy).This is pretty much the same as the others..
I have tried CORDIC but it was developed mainly for trig ( which was the main reason for my trials) needless to say I failed to get a decent speed... It uses floats and floats cost dearly in ram.. I should imagine you could do it with fixed point, but a whole heap of work I didn't need..I was tempted to call the procedure CORDIC
; Quotient is in T1:T0
; Remainder is in T3:T2
; Divisor is unchanged
movlw 16
movwf counter
Loop
lslf T0,f
rlf T1,f
rlf T2,f
rlf T3,f
btfsc STATUS,0
bra Subtract
movf B1,w
subwf T3,w
btfss STATUS,2
bra TestSubtract
movf B0,w
subwf T2,w
btfsc STATUS,0
bra Subtract
SetCount
decfsz counter,f
bra Loop
bra Done ;job done or "return" if called
Subtract
movf B0,w
subwf T2,f
movf B1,w
subwfb T3,f
bsf T0,0 ;flag dividend that divisor subtracted
bra SetCount
TestSubtract
btfss STATUS,0
bra SetCount
bra Subtract
Done
nop
;*********
end
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