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Existing old type LM324 based automatic voltage stabilizer circuit evaluation

Hi there,
I wanted to build up a voltage stabilizer to study its performance.
I got a simple circuit diagram from online, perhaps someone design it without understanding the LM324 op-amp action.
This has made me curious because I wanted to know it works or not.

Take a look below.
Circuit.PNG

The most obscure part is transformer TR1.
The main winding (taps A … E) is most likely a specific, commercial part; but without knowing the expected voltages (or turns ratios) of that winding and taps AND the smaller, isolated one (possibly another 18V, like TR2?), it simply cannot be fully functional.


The three relay drivers on the left side almost beg to be modelled as identical subsections, easily done with the information shown. Same with the High/Low cutout circuit on the right side.

I was trying to simulate this circuit in LTspice, here is the image. Kindly help me to match with the upper one.
LM324_voltage_stabilizer.png

Lets calculate the op-amp gain, and fault.

I will be waiting for your response and guidance and comment. Your similar suggestions are appreciable.

NB: DONT comment something that you are not sure about it, I might be silly for you.
 
You appear to have D1 the wrong way round in your diagram?, the original diagram was correct.

There is no 'gain' as such in the opamps, they are wired as comparators - it's a basic window comparator. The opamps have no functional part in the circuit as such, that is all done crudely by Q1, Q2 and Q3.

The opamp part is just a safety feature, that turns the output OFF, if it's too low or two high (set by the two 20K pots.)

The transformer may not be as specialised as it looks?, it could just be a simple 18V mains transformer, with a multi-tapped primary - such as 0-210, 220, 230, 240. You need to adjust the three 4.7K pots to set the switching points.

It's quite a crude and nasty device :D
 
@NG, thank you to join in this chat. Your comments are important here.

You appear to have D1 the wrong way round in your diagram?, the original diagram was correct.
Are you taking about the bridge diode in LTspice circuit?

There is no 'gain' as such in the opamps, they are wired as comparators - it's a basic window comparator. The opamps have no functional part in the circuit as such, that is all done crudely by Q1, Q2 and Q3.

Exactly, they are comparators, can you calculate the voltage difference in inverting and non-inverting input ? From simulation VCC looks 8.2VDC. When do you think Q1,Q2,Q3 turned ON ? They are not depending on input voltage or rated current? Helping relays ?

The opamp part is just a safety feature, that turns the output OFF, if it's too low or two high (set by the two 20K pots.)
This is the main issue here, in which reference voltage the comparator helping to OFF and ON ?


The transformer may not be as specialised as it looks?, it could just be a simple 18V mains transformer, with a multi-tapped primary - such as 0-210, 220, 230, 240. You need to adjust the three 4.7K pots to set the switching points.

Perhaps for suitability of simulation I was thinking about the TR1 identity. Do you believe this circuit will work ?
What is your expected output looks like?
 
Yes, D1 in your simulation, it's the wrong way round - both the opamp comparators, and Q1, Q2 and Q3 are entirely dependent on the settings of the potentiometer, so it depends where you set the pots to. It would be helpful to you if you had the setting up instructions for the pots.

I can't help on simulations, as I don't use them, but the left and right parts of the circuit are completely separate, I'd suggest simulating them separately, and then later putting them together.
 
Yes, D1 in your simulation, it's the wrong way round - both the opamp comparators, and Q1, Q2 and Q3 are entirely dependent on the settings of the potentiometer, so it depends where you set the pots to. It would be helpful to you if you had the setting up instructions for the pots.

I can't help on simulations, as I don't use them, but the left and right parts of the circuit are completely separate, I'd suggest simulating them separately, and then later putting them together.

I will check it again. For the seek of simplicity in simulation, I replace the detailed relay driver design. When I will made the PCB, I will for sure mount it. Perhaps I have to RUN the simulation with the range of variable resistor in POT functions.
In the simulation, I am getting an AC output of nearly 320V. After bridge rectification, the DC is taken from AC and comparator determines when the voltage should be Cutt Off mode or select HIGH/LOW condition 🤔
 
There appears to be no mention of Q1, Q2, Q3 and associated circuitry in your simulation file?, never mind the required settings for their pots. That is the functional part of the design, without those (and correctly setting the pots) it won't work, as there's nothing to work.
Yes, I did change the D1 direction and now the output looks different, previously it was sine wave.
Take a look
Bridge_diode_modification.png


I am guessing that U4 and U5 (together with their associated components) are a "window" detector, checking to see if the rectified output level is within a window, neither too low nor too high. If so, then one of the pots (U8 or U9) sets the lower trip point (the lower edge of the window) and the other sets the upper trip point.

To see the correct operation of switch S1 in the simulation, there should be a load connected to the OUT net. The LTspice switch is not an ideal switch, and even when it is "open" it is a 10G resistance. With no load connected to the OUT net, all of the voltage passes through the 10G resistor, as if the switch (relay) was closed even when it is open.
 
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