Embedded Processor Timing Analysis/Waveform

Status
Not open for further replies.

usfhugs88

New Member
I need help on how to create a Timing Analysis / Waveform for an embedded processor that will communicate to Memories such as FLASH, RAM and other peripheral Devices. (External Bus Controller point of view)

I would like to know how to create this timing diagram and if there are any books or literature that I can read to understand concepts such as when and where to insert a wait state, where to insert setup time, valid delay, and hold time. I have searched online but not as much helpful.

Please e-mail me or get back on the post.
Thanks
 

Attachments

  • i-o_specs_for_up.xls
    14.5 KB · Views: 122
Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…