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Design a System Timer

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sherry88

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computer contain a timer containing programmable channels. programmable channel mean timer of different duration.I have to design a circuit with four programmable channels, each disabled initially. An unable input, two channel select inputs and four lines for duration input can set any channel to a given duration from 1 to 15 . zero means to disable a channel.four output lines correspond to the channel and are set high as soon as the corresponding timer expires.

Inputs are
1. clock pulse CP
2. Input available IA
3.channel select CS0,CS1
4. Duration D0....D3
Output
1. timer expires TA, TB , TC, TD


Please provide me the solution using combinational logic circuits along with the block diagram....
 

sherry88

New Member
i have tried, by putting select inputs into the 2x4 decoder and output is put in to the input of the counter. i used 4 counters. kindly help me to improve my design
 
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