In spite of HERO999's reservations, I don't see any problem with using a high current N-MOSFET (for your desired negative voltage input and output) for the output transistor Q1 in place of a bipolar to make it easier to drive. Just adjust the value of R1 and R2 to bias the gate at about 10V gate-to-source voltage when the Q2 (now PNP) transistor is on. Since R1 and R2 no longer have to provide significant current to a bipolar transistor base, they can be reasonably large (in the low kΩ region) to minimize resistor power loss.