DC biasing to offset an AC sine wave to a positive values

How to do it in circuit terms? a schematic example would be highly appreciated..

It somewhat depends upon the source of the sine wave and what you want to do with it.

In general you can AC couple the sine wave through a capacitor and bias the output of the capacitor to the desired offset voltage with a resistive divider to a plus voltage and ground using two resistors. The rolloff frequency of the equivalent divider resistance and the capacitor should be well below the lowest frequency you would see.

The 12V 60Hz sine wave is from a stepdown transformer.

I tried using the cap followed by a voltage divider, the cut-off is at 15Hz which is well below my 60Hz, blocking the DC component. But tried it on breadboard, it stays at the same voltage no matter what AC signal i couple in. Maybe my voltmeter could not measure this correctly.

If you are using a DC meter, it will read the average value, which is just the bias value. Try putting the meter in the AC mode. At least you should see the same AC voltage as you are putting in. In the AC mode, the meter will block the bias value.

See the attached.

Thanks, people tats very helpful =) I have few more questions :

1. Thus, I must use a oscilloscope to prove it right?
2. The coupling capacitor is to block DC?How to decide the size of coupling capacitor? the coupling capacitor and resistor forms a HPF thus my operating frequency must be well below my 60Hz right?
3. Can the ADC (analog to digital converter) detect this DC-biased AC sine wave and produce the useful digital values?

Read my posts to this thread.

crutschow said:

See the attached.

View attachment 52163

Click to expand...

Why both your oscilloscope are set to DC? Vin should be AC?

can i use 0.1uF?

Pagedown said:

Why both your oscilloscope are set to DC? Vin should be AC?

can i use 0.1uF?

Click to expand...

If the oscilloscope was set to AC then you wouldn't see the DC offset of the output. AC means the scope is AC coupled and does not see DC.

You can use 0.1uf if you also increase the value of the resistors proportionally to maintain the rolloff frequency well below 60Hz. My example has a 9.5Hz rolloff so you would have to increase both resistors by a factor of 10 to maintain that rolloff.

Pagedown said:

Why both your oscilloscope are set to DC? Vin should be AC?

can i use 0.1uF?

Click to expand...

Hi there,

One way to look at this is to calculate the capacitance required to get the resistive divider center tap to respond up to a percentage of the input.
For example, if we have a 1v peak input and we want the center tap to be within 90 percent of that value, it would reach 0.9v peak relative to the center tap dc value and everything else could be scaled accordingly.

The formula to calculate the capacitance is this:
C=(p*(R2+R1))/(sqrt(1-p^2)*w*R1*R2)
where
C is the capacitance in Farads,
p is the percentage,
R1 is the upper resistor (normally),
R2 is the lower resistor,
w is the angular frequency 2*pi*f where f is the frequency in Hertz.

For example, we have an ADC which reads the center tap, and its max input resistance for decent accuracy is 5k ohms. If we choose R1=10k and R2=10k the input resistance presented to the ADC is 5k ohms, so we satisfied that requirement. Next, we need to calculate the capacitance required to couple the signal to the resistive divider, so we use the equation above. Let's say we want 99 percent of the input to appear at the center tap (a reasonable amount). That means we make 'p' equal to 0.99. Since we are operating at 60 Hz, we make f=60, and since R1 and R2 are both 10k we use those values also, so we get:
C=(p*(R2+R1))/(sqrt(1-p^2)*w*R1*R2)
C=(0.99*(10000+10000))/(sqrt(1-0.99^2)*2*pi*60*10000*10000)
and all we did there was replace the variables with their values, and we get:
C=3.72e-6
which is about 3.7uf.

Now if we apply 1v peak to the input we will see 0.99v peak at the center tap, relative to the DC value there, so if we supply 5v DC to the resistive divider we would see 2.5+0.99=3.49 volts peak at the center of the resistive divider. The minimum value we would see at the tap is 2.50-0.99=1.51 volts. We would then make the algorithm to match this by scaling by the appropriate amount.

Note that if you need attenuation in addition to the coupling itself, you may need to insert a resistor in series with the cap to prevent the input from beaning the input to the ADC when the system is first switched on. This would require a few other calculations or some trial and error. Perhaps a better idea would be to use a clamp with some series resistance, or some series resistance and rely on the ADC input pin protection circuit to clamp the signal.

What is max input resistance for the ADC of a AVR MCU Atmega48? Is it in the datasheet?
I am using 2 resistors of 100k and a 0.1uF cap so the roll off is around 15hz.

Hi,

It should be. If not, you can look up the max change in input bias current with temperature and work that into a voltage change of 1/2 bit in your resistors. When the voltage change is less than or equal to 1/2 bit you have the right resistance.
For example, if your bias (or leakage) current is plus or minus 1ua, and you are using two 20k resistors, then the equivalent resistor value is 10k and 10k times 1ua is 0.010 volts (10mv) and that is roughly 2 'bits' for a 10 bit ADC with a 5v reference. That would really be too high unless the chip is not ever subject to the full temperature range. At half the temperature range, the change would be roughly 1 bit, which is still a little high but may be good enough for your app anyway. Two 10k resistors over half the temperature range would give 1/2 bit which is reasonable. The smaller resistor values require a higher cap value though to couple more of the signal into the divider which has to be considered, but sometimes you need an attenuation anyway.
Note that two 100k resistors is equivalent to 50k, and 50k times 1ua is 50mv which is a little more than 3 bits for the ADC. That means that over temperature the reading could change by as much as 3 bits even if the signal does not change at all. This may or may not affect the application significantly.
Note this assumes a leakage or bias current of 1ua, and i used that because it's a typical value but you may want to look that up on the data sheet.

What if I want to amplify the signal before the input?

MrAl said:

Hi there,

One way to look at this is to calculate the capacitance required to get the resistive divider center tap to respond up to a percentage of the input.

Click to expand...

Hola MrAL,

a) If my signal has, say 1.5 V pk-pk and I want it amplified to get the maximum possible excursion between 0 and 5V at the input of the ADC, where should I amplify?

My guess is prior the divider and adjusted through p. Right?

b) The formula you showed, where does it come from?

c) I see that sometimes a voltage follower is used. When and where could I need it? How to judge on that?

atferrari said:

Hola MrAL,

a) If my signal has, say 1.5 V pk-pk and I want it amplified to get the maximum possible excursion between 0 and 5V at the input of the ADC, where should I amplify?

My guess is prior the divider and adjusted through p. Right?

b) The formula you showed, where does it come from?

c) I see that sometimes a voltage follower is used. When and where could I need it? How to judge on that?

Click to expand...

Hola atferrari,

a.)
The kind of amp you use would probably be an op amp, is that what you would like to use?
If you use an op amp then we would build the circuit around that so the divider would be up front.
It might be a good idea to keep some resistance between the output and the input of the ADC though to limit current just in case.

b.)
The formula you saw for calculating the capacitance i developed myself. Very often i do this when some technique is used often enough.
It comes from analyzing the circuit for determining the inputs and outputs, then solving for C. It's not that hard i could show you if you like.

c.)
A voltage follower is sometimes used to isolate one impedance from another, to get a low impedance from a higher impedance. By itself however it does not amplify the signal, so it would not help you i think. I assume you want to amplify that 1.5v peak up to maybe 2.0v peak or something like that.
You may want to also keep in mind that your AC signal may jump higher than expected for a short time if whatever you have that coming from surges a little. That means you may want to keep a little headroom in your ADC input scheme. For example, instead of 0 to 5v you may want to go 0.5 to 4.5v or something similar to that.

MrAl said:

c.)
A voltage follower is sometimes used to isolate one impedance from another, to get a low impedance from a higher impedance. By itself however it does not amplify the signal, so it would not help you i think.

Click to expand...

If you need isolation with gain then you could use an op amp configured as a non-inverting amplifier. It still provides the high input impedance of a voltage follower circuit but with gain.

I have to add few more questions:-

1. Is Voltage follower really an isolation technique? Cause both input and output still share the common ground correct?

2. If voltage follower is just an IMPEDANCE isolator, what is the use of the impedance isolation? Any simple examples of applications?

3. I set my non-inverting op amp gain to ~75. And I get 1-5V output although there is 0V input given. What could possibly cause it?
Could it be the noise, and the common ground I share between the input and output?

Pagedown said:

I have to add few more questions:-

1. Is Voltage follower really an isolation technique? Cause both input and output still share the common ground correct?

2. If voltage follower is just an IMPEDANCE isolator, what is the use of the impedance isolation? Any simple examples of applications?

3. I set my non-inverting op amp gain to ~75. And I get 1-5V output although there is 0V input given. What could possibly cause it?
Could it be the noise, and the common ground I share between the input and output?

Click to expand...

1. In this context we are referring to impedance isolation or buffering, not ground or galvanic isolation.

2. Impedance isolation can be used if you have a high output impedance that you do not want to load down and corrupt its voltage. For example, you can put an op amp follower at the output of a voltage divider to provide mA of output current (up to the op amp limit) without affecting the divider voltage.

3. What type of op amp and what are the power supplies? Is the input grounded when you measure this voltage? Post a schematic.

MCP601 single supply opamp. Ya the input,output and 0V of the supple are at the common ground. Could it be the input offset voltage that is amplified?

I will post it soon. It is just a simple opamp with non inverting configuration. but output itself is unpredictable. maybe gain and voltage offset gives me tat result.
It should be 0 when Vin is 0 right?

Pagedown said:

I have to add few more questions:-

1. Is Voltage follower really an isolation technique? Cause both input and output still share the common ground correct?

2. If voltage follower is just an IMPEDANCE isolator, what is the use of the impedance isolation? Any simple examples of applications?

3. I set my non-inverting op amp gain to ~75. And I get 1-5V output although there is 0V input given. What could possibly cause it?
Could it be the noise, and the common ground I share between the input and output?

Click to expand...

Hi again,

For (1), the voltage follower takes a high impedance and converts it to a low impedance so it can help a high impedance signal drive something that requires a lower impedance, but it can also be used in filters to isolate a filter function from a node and this allows us to get various advantages in the filter design while still only having to use the op amp with a gain of 1. The voltage follower has a gain of +1.

For (2), as above in a filter to keep the gain at 1 yet still get certain filter functions. It isolates one node from another, or looked at another way, takes a node and converts it into a voltage source. It's handy for certain filters.

For (3), if you set the gain to 75 with that MCP601 you should see a max of 0.15 volts on the output. If not, something else is wrong. BTW for the AC application you have been talking about you can not use a gain that high because it will also amplify the DC voltage and that will pin the output to a high state.

Are you doing something else that requires a gain of 75 ?

Success - let's move ahead!

Thanks to you both for your time.

crutschow said:

If you need isolation with gain then you could use an op amp configured as a non-inverting amplifier. It still provides the high input impedance of a voltage follower circuit but with gain.

Click to expand...

Thanks Carl for the reminder. Had overlooked that!

MrAl said:

a.)
The kind of amp you use would probably be an op amp, is that what you would like to use?
If you use an op amp then we would build the circuit around that so the divider would be up front.
It might be a good idea to keep some resistance between the output and the input of the ADC though to limit current just in case.

Click to expand...

Sure, an op amp.

Divider ahead. Noted.

How to calculate the value of the series resistor?

Sorry, I mentioned a wrong value; my signal in the current case has 5,2 V pk-pk. More than needed.

I just went for the reduction (p) and have a happy (4,2 - 0,4 V) range implemented with a 3K9+3K9 divider plus a .39 uF capacitor for a signal of 286Hz.

The PIC's ADC requires a source impedance of 2K5 maximum.

MrAl said:

b.)
The formula you saw for calculating the capacitance i developed myself. Very often i do this when some technique is used often enough.
It comes from analyzing the circuit for determining the inputs and outputs, then solving for C. It's not that hard i could show you if you like.

Click to expand...

Yes, please do! I appreciate your offer, really. Be as detailed as you want even if you think you are stating the obvious. I prefer that.

MrAl said:

You may want to also keep in mind that your AC signal may jump higher than expected for a short time if whatever you have that coming from surges a little. That means you may want to keep a little headroom in your ADC input scheme. For example, instead of 0 to 5v you may want to go 0.5 to 4.5v or something similar to that.

Click to expand...

Noted, but cannot avoid the feeling that I am wasting resolution here. More in this case where it is me who is generating the signal for an initial test. Later yes, it could be something I could not control completely.