No, you need to build an oscillator around it - presumably your FPGA includes that capability?, or you can use a CMOS gate to do it (google crystal oscillator).
Cheers. That makes more sense. I haven't the time to do more designing so i think i'll use a 4 Pin SG-51 series crystal oscillator chip. As far as i can tell it has 5v in and creates the 4MHz 0/5v output signal (i'm a little hazy on that issue)
**broken link removed**
Let me know if i'm wrong.
As far as i know (and according to a more knowledgeable classmate) the spartan 2e varies it's clock speed.
If anybody knows how to create a 1ms high/249ms low clock signal in VHDL i'd like to know as days of googling has found nothing. Plus, the only VHDL book at my university is hopeless. It hasn't helped much (except for a minimal counter design).