By way of explanation of the circuit in post #6 :-
C3, R4, U3, U4 form a monostable circuit providing a switch-debounce function with a pulse width of ~ 12mS. If that's insufficient increase R4.
U1, C2, R3 form a gated oscillator.
C1, R5 provide a delay of ~ 1 sec before the oscillator is gated on. Adjust R5 as necessary to alter the delay.
Adjust R3 to alter the oscillator pulse repetition rate (~ 15 Hz).
The pulse outputs of the monostable and oscillator are combined by gate U2 to give the required clock signal for the counter.