It's old-school stuff. There used to be these things called "bucket brigade delay lines" which was just a linear array of capacitors with switches. Essentially you'd shift some charge into the first capacitor, hit the clock, and the charge would get shifted into the next capacitor over. Big analog shift register.
How it works is described in the TC211 data sheet I linked in the previous post - You've got charge "wells" in the silicon created by doping which act as isolated capacitors. Then you've got some gates on top which 1) pull the charge from the well into a temporary holding area, and 2) push the charge into the next well in the second phase of the clock, when the gate is pulled "high".
The rows are shifted into the readout array using the same idea, but from the other direction. Both CMOS and CCD's will have some similar limitations - usually it's a lot easier to chose particular rows, and harder to choose columns in a row.