Rather than try to inform you from my limited knowledge, here is a useful link:
https://www.electro-tech-online.com/threads/power-supply-design-for-beginners.113613/
I did read recently that despite appearances to the contrary, in a linear psu with a more convention layout (ie, pass element is an emitter follower driven by an emitter follower, you actually need about 3 volts more rms than your highest dc output. Even with a low dropout design, which yours appears to be, you still need some headroom as this will give you further ripple reduction. So you should probably have an 18v transformer. But I've learnt something here - I never knew 1.4142 was the square root of 2! I always just used it as a magic number
There is a surprisingly effective design to address ripple posted on here recently, hard to make sense of (looks bonkers to be honest) but well worth a look:
https://www.electro-tech-online.com...sperate-measures-with-my-power-supply.141942/ - further along the thread contributors have done some simulations.
Speaking of simulations, why not try simulating the analogue aspects of your design. LTSpice is a favourite here, TinaTI is good also.
Sorry I don't know much about mosfets to answer point 2 - but I think I gave you a partial answer above.
Re point 3 - I'm pretty ignorant when it comes to op-amp design, but the simplest thing to do would be to find out the impedance you need to get the feedback you want at the frequency you are interested in, and choose your caps based on that. While I think of it, since you are interested in fast reaction times, your "big slow" here is going to be the rc network formed by the 1k5 resistors, the zener junction capacitance and the mosfet gate capacitance. Whilst on the subject, be careful about what kind of load your opamps IC6 and IC7 can handle with regards to capacitance, though the resistors should make it a non-issue in the majority of devices.
4 - Depends on the feedback path through the ADC and DAC. Chances are you need to lower its gain, possibly even down to unity. But then you say "goes into current limit mode" - so this is supposed to be a limiting circuit, not a constant current setting? Better as it is then, but I don't think it is going to do what you want.
6 - I may be wrong but I think you are missing an important point in all of this - the tolerance of your two 0.1 ohm resistors. Consider if one out by +5% and the other by -5%. This is going to be considerably worse than the resolution of you DAC/ADC combo. So when you use just one of them for something, you create an intrinsic error. That's okay for your load sharing scheme as it is, you can just calibrate it out, but when you talk about using just one to get double the resolution, it's a false economy - the calibration for 2 sense resistors become irrelevant.
I don't see any path to tell the micro what the output voltage is. Without this your high resolution voltage setting is meaningless, trimpots or not. Suppose you set it up so 5.000v setting = 5.000v output. You run it for a week. During this time, all the voltage references will have drifted, the mosfets will have drifted, the resistors and trimpots may have drifted, the opamps won't have the exact same characteristics they did. Oh I forgot, you also have thermal effects whilst it is running, including emf's due to all the soldered joints, drift in the voltage references, drift in all other semiconductors, drift in the resistors, probably worse in the trimpots unless they are low tempco. These effects might cancel out, or they might add up. You only have limited voltage feedback (via IC3 AFAICT) to compensate for drift in the mosfets.
That's some impressive kit you have there, BTW. What are the blue and brown things?
Well, hope this helps.