I did answer your question 1. You might have read the bitwise arbitration process but you didn;t think about how it works in all cases as you were reading.
Think about this:
Suppose two devices transmitted the same message. Who wins arbitration? Does it even matter? No it doesn't matter because the message on the bus is what each device is trying to send. Each device will think it has won arbitration but it doesn't matter because they are sending the same message.
So now think about what happens when the identifier is the same, but the data is different. Think about what happens when the identifier is the same, the first half of the data is the same, but the second half of the data is different. In all these cases, all transmitting devices will assume they have won arbitration and continue to send their message. They will continue to send their message and continue to think they have control of the bus until they try to place a recessive bit on the bus but have it read back as a dominant bit. When this is happens, the device knows that another device was transmitting a message that was identical up until this point and has won arbitration of the bus. The device then stops transmitting so it doesn't corrupt the other device's transmission and listens to the bus instead. The device that won arbitration doesn't know that there were other devices also contending for the bus- it just keeps sending as normal until it's message is done.
You can think of both data frame as operating the same way as the identifier does for bus arbitration. The identifier exists to assign message priority without without interring with the data. But if two messages have the same identifier then the data becomes part of what decides who gains control of the bus during arbitration. The first device to send a dominant bit while the other devices send a recessive bit wins control of the bus NO MATTER WHERE THIS BIT IS. It could be a bit in the identifier or the data. It doesn't matter.
CAN Bus Arbitration Method
TO my understanding, this works because a bit error only happens when a dominant bit is placed on the bus but a recessive bit is readback from the bus. If a recessive bit is placed on the bus but a dominant bit is read back, this is not considered a bit error (because it can mean another device with higher priority is transmitting).
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Oh I see. I misunderstood your question 3. You say there's only one node constantly transmitting with no other nodes on the bus to acknowledge. If the transmitting node gets no acknowledge then it will start an error frame after which it will try again to transmit the message.
CAN bus Error Handling - Acknowledgement Error
If there continues to be failures, the transmit error counter keeps increasing until it passes the threshold. When this happens the node goes into shutdown because it thinks it might have failed and would rather not inadvertently interferre with other communications that might be happening on the bus.
CAN bus Error Handling - Transmit Error Counter
CAN bus Error Handling - Fault Confinement Rules 1-4
CAN bus Error Handling - Fault Confinement Rules 8-12
Try running through that website. Because I only knew the general basics for the your questions. I had to go through the website myself to refresh and verify everything before answering your questions.