;******************************************************************
; *
; Delay(16..262159 Tcy) subroutine Mike McLaren, K8LH, Jun'07 *
; *
; 12 words, 1 RAM variable, 14-bit core *
; *
Delay.16
nop ; entry point for delay%4 == 3 |B0
nop ; entry point for delay%4 == 2 |B0
nop ; entry point for delay%4 == 1 |B0
DelayLo addlw -1 ; subtract 4 cycle loop time |B0
skpnc ; borrow? yes, skip, else |B0
goto DelayLo ; do another loop |B0
nop ; |B0
DelayHi addlw -1 ; subtract 4 cycle loop time |B0
decfsz TMRH,F ; done? yes, skip, else |B0
goto DelayLo ; do another loop |B0
goto $+1 ; burn off 2 cycles |B0
return ;
; *
;******************************************************************
radix dec
clock equ 8 ; 4, 8, 12, 16 or 20 MHz
;
; DelayCy() operand multipliers
;
usecs equ clock/4 ; cycles/microsecond multiplier
msecs equ usecs*1000 ; cycles/millisecond multiplier
; *
; DelayCy() macro *
; *
DelayCy macro pDelay ; cycles (Tcy), minimum 16
local cycles
cycles = pDelay
while cycles > 262032
movlw high((262016-16)/4)+1
movwf TMRH
movlw low((262016-16)/4)
call DelayLo-(262016%4)
cycles -= 262016
endw
movlw high((cycles-16)/4)+1
movwf TMRH
movlw low ((cycles-16)/4)
call DelayLo-(cycles%4)
endm
; *
; example code for simulation testing; *
; *
SimTest DelayCy(2*msecs) ; remember to set 'clock' equate
nop ; put simulator break point here
; *
;******************************************************************