I wasn't expecting it to work because the lower FET has the charge around the gate and drain, but modifying an LTSpice example shows otherwise with the voltage drop across both being equal.
Anyone able to validate if it's a LTSpice quirk or whether it will work?
It won't be fast enough, the source is a rectified AC with minimal capacitance. I've played with these types of switches before (the PMOS + 2xPNP) and when the voltage is similar on both sides the pull-down is minimal, which leads to heat in the PMOS. It's no better then a sckhotty in that situation.