clock equ 8 ; 4, 8, 12, 16, 20 MHz, etc.
usecs equ clock/4 ; cycles per usec multiplier
tStep equ 1*usecs ; cycles per BAM step (1T)
;
; in-line fixed delay macro, 0..1027 cycles, 14 bit core
;
inDlyCy macro delay ; generates 0 to 6 instructions
local loop
if delay > 3
movlw delay/4-1 ;
loop addlw -1 ; borrow? (4 cycle loop)
bc loop ; no, branch, else, fall thru'
endif
if delay%4 >= 2
goto $+1 ; delay%4 == 2 or delay%4 == 3
endif
if delay%4 & 1
nop ; delay%4 == 1 or delay%4 == 3
endif
endm