Best 3.3v to 5v Bidirectional Logic Translator

[MrAl]

Hi Grandad, Ian, and Ron,


Yeah i am going to get a couple of those and test them.

In case you did not know, each channel of those MOSFET based translators is made from a N-MOSFET with this simple set of connections:

Source to 3.3v side input/output pin.
Drain to 5v side input/output pin.
Gate tied directly to +3.3v supply.
10k pullup from source to +3.3v supply.
10k pullup from drain to +5v supply.
Schottky diode from 3.3v side pin to 5v side pin, cathode to 5v side pin anode to 3.3v side pin.

As you probably know, for the data channel either the 3.3v pin or the 5v pin side can be an input or output.
If the 3.3v pin outputs +3.3v, then the 5v side is simply pulled up to +5v because the MOSFET is off.
If the 3.3v pin outputs a low 0v, then the MOSFET turns on and pulls down the +5v side pin and so the +5v side pin sees a low too.
If the +5v pin outputs a high +5v, the MOSFET is off because the +3.3v side pin is pulled up to +3.3v and so the MOSFET is off.
If the +5v pin outputs a low 0v, the Schottky conducts and pulls the +3.3v side down to near (but not exactly) zero volts.

Buss contention could occur if the +3.3v side puts out a low 0v and the +5v side tries to put out a high, because then the MOSFET turns on (just as it would if the +5v side was configured as an input) and conducts current from the +5v side into the +3.3v side. This means the +3.3v side could have to sink a lot of current, depending on the Rds of the MOSFET (we could look that up).
Normally this probably wont happen, but if something goes out of sync for even a moment it could.
The max current on the 3.3v pins i am working with is 6ma sink. So i have to ensure that there is never more than that during startup or any other time.
Buss contention could also occur if the 5v side tries to output a low (which it has to do now and then as an acknowledge signal) and the 3.3v side tries to put out a high 3.3v signal, and the max current of the 3.3v side is 3ma source. This means the timing has to be just right or at the least there will be a current spike to deal with, if it doesnt blow out the pin that is.

There is another type of translator too i saw, which uses resistors to get from 5v to 3.3v, but it's only one direction and that is from 5v to 3.3v, not the other way. It has only 2 MOSFETs on the board and about 8 resistors, not the 4 MOSFETs of that linked to board.

 

[Mikebits]

I think I found the part that will do what you want, specifically designed for I2C level translation.
NXP: https://www.nxp.com/products/interface_and_connectivity/i2c/i2c_voltage_level_translators/#overview
App Note: **broken link removed**

 

[MrAl]

Hi,

Yes thanks Mike. I looked at the data sheet, and they seem to have considered the start-up buss contention possibility i mentioned. They included the "EN" terminal which can force a small delay before the device is allowed to permit communications from low to high or high to low logic levels. That is a good feature i think.

The ready made boards look the same, just dont have that "EN" feature. I believe it could be added though, with a little board surgery
They also show a cap and resistor like we talked about to enable the device, instead of having to use another uC pin just for that.