Atmel vs PIC

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I have seen frequency counters for PIC's going up to 70Mhz ( 50Mhz according to specifications based on the datasheet).

For AVR - Elektor article **broken link removed** - "The microcontroller is clocked at 20 MHz, and so the counter module can be used at frequencies of up to 5 MHz without the need for a prescaler"
Also 30Mhz Frequency meter / 5 Mhz counter
I have never seen a AVR counter design reading past it's clocking frequency.
I am confused about Ubergeek63 's assertation's that "they were lying"
 
There was a 50MHz counter in the MicroChip application notes years and years ago, so long ago it used an OTP chip - many years later it was ported to the EEPROM based chips (and LCD replaced the LED display), and for many years was available as a kit (I have one here I bought a long time back).
 
Uber you seem to be confused. AVR or PIC you can only sample the externally driven timer during a system clock boundary. But on a PIC the timer itself is asynchronous. It's limited only by it's analog bandwidth and the driven signal, which can be WAY past system clock speeds. The AVRs externally driven timer is synchronized to the system clock, Nyquist kicks in real fast, if you try to sample a signal more than 1/4 the system clock of an AVR you're going to get aliasing effects that will mirror harmonic frequencies.
Either way really if you want a truly high speed frequency counter with PIC or PIC you just use an AVR or a PIC and you pick a good external counter and just use the PIC or AVR to sample it, they're both limited on sampling to system clock ticks anyways, and you can get massively higher frequencies with an external counter.
 
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I'm a little confused what you're on about?, all you need for massive higher frequencies is a prescaler - which you require anyway, for frequencies higher than 50MHz or so (usual TTL upper limit).
 
My confusion was primarily was the async nature of some of the PIC timers.

The reason for the counters to be synchronized is to eliminate metastability in the reading of the counter. While you were referring to the sample granularity, without synchronization you could have the reading latch stuck in an undefined state for 10x the rated clock frequency and be at a random value after that.

This effect would only be seen when the counter was changing at the "instant", between the undefined internal setup and hold times of the chip, the sample was taken.

The only ways around it would be to gate the HF counter input with a crystal referenced counter and taking the stable reading in between or taking an average of similar readings while throwing out the wild ones.
 
Nigel Goodwin said:
I'm a little confused what you're on about?, all you need for massive higher frequencies is a prescaler - which you require anyway, for frequencies higher than 50MHz or so (usual TTL upper limit).
Click to expand...
Who uses those museum pieces anymore? LV uses a fraction of the power and runs 200MHz for around not much more money.
 
Ubergeek63 said:
Who uses those museum pieces anymore? LV uses a fraction of the power and runs 200MHz for around not much more money.
Click to expand...

You still need a prescaler to get to 500MHz, so there doesn't seem much advantage? - 500MHz is a commonly desired range to cover both 2m and 70cm.
 
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