Assistance implementing 3 electronic units.

[JA76]

Hello and thanks for this thread. I would need some help to physically implement 3 electronic units:

-Unit 1: The Unit 1 directs incoming intensities (i1 , i2 , i3 and i4) to output 1 or output 2. Output 1 can be activated by the previous action of any of i1 , i2 , i3 or i4, and output 2 can be also activated by the previous action of any of i1 , i2 , i3 or i4 . Output 1 is permanent until output 2 is activated, and vice versa.

-Unit 2: The Unit 2 directs incoming intensities (i1 , i2 , i3 and i4) to any of output 1, 2, 3, or 4. Again, all outputs are permanent and activated by previous action of any of i1 , i2 , i3 or i4.

-Unit 3: The Unit 3 functions as an “electronic prism”. Incoming intensities (i1 , i2 , i3 and i4) are always directed to their fixed corresponding outputs.

I have some basic electronics background but any help would be much appreciated specially by my dog, Mr. Firecrackersson.

 

[dougy83]

What are you building? What is an 'intensity'? What is this connecting to?

 

[alec_t]

Is 'i' a voltage, current, light level, AC signal, DC signal, sound level ....... ??

 

[dr pepper]

An analogue multiplexor might do the job, however as everyone else I do not get it.

 

[atferrari]

Deleted

 

[JA76]

Hello I'm back. I been doing some research since my electronics background was not as good as I thought. I am working on a new computing paradigm that I will gladly comment here, if successful. Step by step, though.

I have some circuit designs for your evaluation:

Unit 1: Input voltage from source line is directed to bit line 1 or bit line 2 by activation of word line 1 or word line 2. The unit I comprises two FGMOSFETs (F1 and F2), 4 MOSFETs (M3, M4, M5 and M6) and 5 sub-circuits (V1, V2, V3, V4 and V5). Function:

1-Unit 1 is reset by writing F1 and erasing F2.
2-First input voltage is directed to bit line 1, on its way:
3-Connects V1 which erases F1.
4-Connects V2 which writes F2.
5-Now the second input voltage is directed to bit line 2, on its way:
6-Connects V3 which erases F2.
7-Connects V4 which writes F1 so the cycle starts again.
8-The unit is reset by activation of circuit V5.

Questions:

a - Are the FGMOSFET and MOSFET drawings acceptable? They seem very clear to me yet uncommon.
b – Is the unit viable as described?

Thanks!