;Register file map
ADCON1 equ 9fh ; in bank1
STATUS equ 03h ; in bank0
TRISA equ 85h ; in bank1
PORTA equ 05h
RP0 equ 05h
RP1 equ 06h
COUNT1 equ 20h; first counter for our delay loops(General Purpose register)
COUNT2 equ 21h
COUNT3 equ 22h
COUNT4 equ 23h
org 00h ; set origin
; Program starts here
clrw ;clear working register
BCF STATUS, RP0 ; makes RP0 and RP1 0 to selectbank0(we equ'd 03h to STATUS maro)
BCF STATUS, RP1
CLRF PORTA ; Initialize PORTA by clearing output data latches
BSF STATUS, RP0 ;RP0=1, RP1=0 to select bank1
MOVLW 0x06
MOVFW ADCON1 ; make PORTA digital :D
MOVLW 0x00 ; make PORTA output(you know this ****)
MOVFW TRISA
BCF STATUS, RP0 ; transfer to bank 0
BCF STATUS, RP1
START MOVLW 0xFF ; turn all leds on move to Wreg
MOVWF PORTA ; put the value on the actual port
;delay
MOVLW 0xFF
MOVWF COUNT1
MOVWF COUNT2
LOOP1 DECFSZ COUNT1, 1
GOTO LOOP1
DECFSZ COUNT2, 1
GOTO LOOP1
MOVLW 0x00 ; turn all leds on move to Wreg
MOVWF PORTA ; put the value on the actual port
LOOP2 DECFSZ COUNT3, 1
GOTO LOOP2
DECFSZ COUNT4, 1
GOTO LOOP2
end