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The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> bits contain
the two LSbs.
Step CCPR1L
0 00000000
1 00010000
2 00100000
3 00110000
4 01000000
5 01010000
-
-
14 11100000
15 11110000