Actually my question is not to find wrong in schematic. Question is please explain the working of analog multiplier provided schematic there.
I recognize that as a National Semiconductor schematic.
In a BJT, Ic≈Ie=Is*(e^(Vbe/Vt)-1)), the well-known diode equation.
For Ic>>Is, Ic≈Is*e^(Vbe/Vt)
Ic/Is=e^(Vbe/Vt)
Taking the log of both sides,
Vbe/Vt=ln(Ic/Is)
In the attached schematic,
V(A)=Vbias-Vt*ln(I1/Is)
V(B)=Vbias-Vt*ln(I1/Is)-Vt*ln(I2/Is)
V(C)=Vbias-Vt*ln(I3/Is)
Vbe4=V(C)-V(B)
substituting,
Vbe4=Vbias-Vt*ln(I3/Is)-(Vbias-Vt*ln(I1/Is)-Vt*ln(I2/Is))
simplifying,
Vbe4=Vt*(ln(I1/Is)+ln(I2/Is)-ln(I3/Is))
Vbe4=Vt*ln(I1*I2/(I3*Is))
From the diode equation,
I4≈Is*e^(Vt*ln(I1*I2/(I3*Is))/Vt)
I4/Is=e^ln(I1*I2/(I3*Is)
Taking the log of both sides,
ln(I4/Is)=ln(I1*I2/(I3*Is))
I4=I1*I2/I3
Since R1=R4=R9=R11=10k,
Vout=V1*V2/V3
Q.E.D.
I hope I didn't make any typos.
EDIT: In order for Is to drop out of the equations, all transistors must have equal Is. Therefore, they should all be on the same chip, such as a CA3046. I suspect the asterisks on the schematic refer to a comment in the original app note to this effect.