Active, Input Impedance from V and I plots

[Maklaka]

View attachment 65750

Gentlemen, it's pleasure to meet you. I have a question that require's a bit o' theory and some practice.

My coworkers and I have been tasked with finding the active impedance of one of our DC systems. We are assuming that it is net capacitive in behavior. That being said, the circuit is simplified in the attached picture. Our goal is to find the capacitance of this system. Since power up is a hairy mess of random boot-up times, we decided to test this value with a step response. That is to say, we are switching a series resistance in and out of the circuit after it has reached steady state by utilizing a debounced switch and an NFET. We triggered on these events to get some plots of Vc and Itotal with our handy Tek scope. Assuming I can eventually figure out how to get raw excel or CSV data from the waveforms, how might I implement the derived equation shown below so that I can find C?

RL, the resistive load, we know from the steady state Vc and Itotal, easy enough. I can also plot the derivitive of Vc with respect to time on the scope, dandy.

The question is, at what time sample do I determine C? I'm thinking I might need to bust out the differential equations book for greater insight, but can you gents think of a way to get that C value from the raw data?

 

[MrAl]

Hello there and welcome to the forum,


Using a current step I amps that has zero rise time and some initial voltage Vc0 volts across the capacitor we have:
Vc=I*R-I*R*e^(-t/(C*R))+Vc0*e^(-t/(C*R))
where
Vc is the capacitor voltage at the end of the time period t,
I is the height of the current step in amps,
Vc0 is the voltage across the cap before the step,
R is the load resistance shown in your schematic,
t is the time the voltage Vc is measured after the step has occurred.

After taking the new Vc measurement after time t, the capacitance is then:
C=t/(R*ln(Vc0/(Vc-I*R)-(I*R)/(Vc-I*R)))

However, the time period can not be too long or the results will be inaccurate. At the time Vc is measured Vc should still be increasing.

When there is no current step (I=0) the circuit is just a resistor discharging a capacitor so you could use the exponential:
Vc=Vc0*e^(-t/RC)

as long as you dont let it discharge too low (like maybe 10 percent).

Another method might be to apply a sine wave riding on the DC and take a few measurements.

 

[Maklaka]

Dead thread revival, because I love ettiquete. I'm wondering how accurate a result I can get from that formula. Eyeballing the waveforms got me the following results:

At time from instant current rise At given Vc Calculated C
400us 12.90V 156uF
200us 11.94V 106uF
96us 11.68V 80uF
44us 11.56V 49.2uF



So it seems like the closer I measure to the "instantaneous current spike", the lower the capacitance value I get. I took some averages around 98us from the spike in the raw data and I retrieved 64.9uF.

I'm guessing that the problem with this model is that we assume the current spike is instantaneous when it, in fact, it probably rises over the course of about 50us.

I'm wondering if I can get a good C value from an exponential regression on the data (say, from matlab) where I assume y = ae^(bt) and b = 1/RC
Excel was incapable of giving a good exponential regression of the form y = ae^(bt).

Ahhh, my. What a complicated process for such a simple number.

 

[MrAl]

Hi,


If you have a ramp other than a true step change then yes we would have to modify the formula to take into account the slower rise time of the forcing function. A ramp would cause a very different result.

What you would have to do is look at the scope and try to approximate the rise time as a ramp and then use a different formula:
V=(C*I*R^2*e^(-t/(C*R))-C*I*R^2+t*I*R)/t+vc0*e^(-t/(C*R))

where
V is the cap voltage at the end of the test ramp period,
C is the capacitance,
R is the DC load resistance,
I is the ramp height at the end of the test ramp period,
vc0 is the cap voltage at the start of the ramp,
t is the time at the end of the ramp.

This is a little harder to calculate C from but that's what you would end up with using a ramped current.
For example, with R=10 and I=10 (I is the ramp height at the end of the ramp period), vc0=10v, t=7ms,
the voltage after the 7ms is about 33v. Solving the equation numerically that means C=1000uf.

If you want to ramp the voltage instead we could work that out next.

Usually a sine wave is used for these kinds of tests.

I have been able to successfully test capacitors for ESR using a step current which means a step voltage is applied to a resistor in series with the cap under test. The cap voltage doesnt change much so the current is easy to calculate and on the scope we see a quick change in voltage across the cap followed by a slow change in voltage. The quick change is due to the ESR and so all we have to do is divide that change in voltage by the current and we know the ESR.
I havent tried for any prizes in accuracy with this approach, but it does help to identify high ESR caps and this test is good because it mimics the behavior of the switching circuit it would have to operate in. So sometimes the test is designed to match the application as close as possible.

With these time domain tests you have to make sure that you are within the time period where the cap actually does anything. With step in voltage across an RC network for example after about 5 time constants it would be hard to determine anything because the cap becomes fully charged. It's only during maybe the first 3 time constants that anything useful can be found.

You also have to realize that if the resistance is low and the cap is of low value it may be very hard to see the changes required without using a short time period because the RC time constant is short.

If you ramp the current up and down you should be able to estimate using your calculus formulas too, i dont see why not. As long as the cap voltage doesnt change too much while the test is being done. Take the reading as the voltage of the cap goes though nominal zero (as the current ramps plus and minus).
For example, if the nominal voltage is 20v and it goes plus and minus with a plus and minus ramp of 2.2amps, when it goes through 20v the change from 19v to 21v occurs in 1ms, so that's a dv/dt of 2/0.001=2000. Now we have:
di0=di/R
i-di0=C*dv/dt
2.2-2.2/10=C*2000
so
C=1.98/2000=990uf
The 'true' capacitance was 1000uf.

When using a sine wave, the amplitude of the current is:
Ampl=(E/R)/sqrt(w^2*R^2*C^2+1)

and the phase shift:
atan(w*C*R)

From the amplitude we get:
C=sqrt(Ampl^2*R^2-E^2)/(w*E*R)

where
E is the input sine amplitude (volts peak or rms volts),
Ampl is the current response sine amplitude (same peak or rms as E except amps),
R is the load resistance in ohms,
w=2*pi*f,
f is the frequency in Hertz

 

[Maklaka]

Are you a differential equations god or do you just have the biggest reference manual on earth?

 

[Maklaka]

Furthermore, when one uses a sine wave to test active impedance, how does one get capacitance directly from the phase/magnitude? Can you recommend some resourceful documentation for that sort of test?

 

[MrAl]

Are you a differential equations god or do you just have the biggest reference manual on earth?

Hi again,

Not sure what you mean here. I am using circuit analysis which may or may not need differential equations. There's also Laplace Transforms which helps a lot for these smaller tasks. This involves solving the circuit for whatever variables you think you can measure and then simplifying as much as possible to get the solution you want.

I was editing my previous post adding stuff you probably didnt see before you replied so i'll repeat the sine wave test part here. It's not that hard to comprehend so you dont need a full reference i dont think.


When using a sine wave, the amplitude of the current is:
Ampl=(E/R)/sqrt(w^2*R^2*C^2+1)

and the phase shift:
TH=atan(w*C*R)

where TH is the angle beween current and voltage.

From the amplitude we get:
C=sqrt(Ampl^2*R^2-E^2)/(w*E*R)

where
E is the input sine amplitude (volts peak or rms volts),
Ampl is the current response sine amplitude (same peak or rms as E except amps),
R is the load resistance in ohms,
w=2*pi*f,
f is the frequency in Hertz

It's also a little interesting that the resistance is:
Rx=E/(Ampl*abs(cos(TH)))


However, if the input surge during startup is a major concern then it should be tested at turn on not during normal operation.

 

[Maklaka]

Very good, though you mean the opposite of what you said in your last remark, correct?

 

[MrAl]

Very good, though you mean the opposite of what you said in your last remark, correct?

Hi,

Not sure what you mean here. If you get an input surge during turn on then you need to know what that surge is with the typical hook up. If you try another way you may miss part of the response. Most every real life response has an exponential part and sinusoidal part. The exponential part can sometimes draw more current during turn on so that needs to be investigated. If you analyze after the turn on point you miss the part you're really after unless your circuit just happens to behave nicely
Granted some circuits will behave better than others with a fast exponential part. The exponential part is the part you sometimes hear when you switch a transformer on connecting it to the line. It's sometimes much louder than the normal operation noise it might make.

Why is your concern for when the units are first switched on to the power line?

 

[Maklaka]

Hi,

Why is your concern for when the units are first switched on to the power line?

I am testing a network of units that have inconsistent boot-up times. The power demand is sloppy on boot up.

 

[MrAl]

Hi,

Could it just be that a random number of units are trying to start all at the same time? That would cause a variable current draw depending on who knows what. You might try booting up in a set sequence if that is the case. Maybe turn one on every second or more but dont turn two on at the same exact time. Just a guess here though as i cant see the system from here

 

[Maklaka]

So what's the best way to go about injecting a sine wave over the DC? I've hooked a function generator up in parallel with the battery connection but the signal gets attenuated greatly. Should I interface between the generator and the DC system with an amplifier first? Being a noob is tough stuff. ;p

 

[MrAl]

Hi,


Hey you know that's a pretty good question

With a resistor in series with the function generator assuming it can take the buss voltage, what's going to happen here is if we measure the amplitude across the input (sine part) and the current through the resistor we're going to see an impedance that reflects the battery impedance as well as the input impedance, the battery being in parallel means we'll see the BATTERY][INPUT (i used ][ to show parallel there) in stead of just INPUT. So it might take two measurements, one of the whole system and one of the battery. Hopefully we can then develop a decent equation (with the two measurements as inputs) that isolates the system input impedance alone.

In the past i've done small batteries this way. Connected a function generator in series with the battery and a series resistor. Measure voltage across the battery, measure current through the resistor, all on the scope so i could evaluate phase angle.
The measurement would include the peak to peak voltage and peak to peak current, as well as the phase angle between the current and the voltage (a scope pic would be best here).

If you want to try this we can give it a shot.

 

[Maklaka]

So you've measured the impedance of batteries in that way? Aren't batteries essentially modeled completely with an ideal voltage source and a series resistor? ;p

I jest, but my goodness, could the reactance of the battery be considered negligible compared to a DC system with a bunch of switching regulators, cabling, and filter caps?


To answer your question, yes, let's give it a shot, and let me say with complete sincerity that you are the most helpful person I have ever met online.

Though the following document might partially be a sales pitch, it does seem to have a fairly comprehensive review of this topic. Perhaps it can be resourceful to us both.

https://www.electro-tech-online.com/custompdfs/2012/08/5950-3000-1.pdf

 

[Maklaka]

We actually do have this fancy Agilent LCR laying around. I wonder if that "DC offset" feature is capable of sourcing the 700mA @ 12V I need for the operation. Hmmmmm....



View attachment 66180

 

[MrAl]

Hi,

A simplified model of a battery includes an ideal voltage source in series with a resistor. A more accurate real life battery model includes several resistances and two or three capacitances. There is one capacitance in particular that is more directly tied to the output terminals and that is the one i was most worried about. Granted this worry could be for nothing if the system capacitance swamps the battery capacitance, but i figured it wouldnt hurt to measure the battery too. If you wish to skip that phase that's entirely up to you. The measurement would mostly confirm that the battery capacitance is negligible.

That paper is rather long, and im not sure if it actually provides a procedure for doing this kind of test. Perhaps you can look it over and let me know. It might also be better if we just went back to the dv/dt methods and skip the sine test. If your LCR meter could help here that would be interesting of course.

Without worry about the battery effect for now, did you try the sine test and see what kind of waveforms you can get on the scope? We are looking for the sine voltage peak to peak across the input, and the current through the series resistance, and their phase relationship preferably with a scope snapshot.

 

[Maklaka]

I found an article that actually does show two kluge but nevertheless legitimate ways of getting a sine wave on top of a DC offset.

https://www.electro-tech-online.com/custompdfs/2012/08/5990-3466EN.pdf

I am going to try the battery in series with the generator this time (as described in the link above) and if that works, I will proceed with the formulas you provided. I'll have some scope captures up soon as well. If that result is inadequate, I might try the "bridge method" of impedance measurement as described in last agilent article I posted and as described even better in this article:

**broken link removed**


Gonna have to find me a varicap...

 

[Maklaka]

Well I tried the battery and a couple of different switching power supplies as my DC voltage source... no luck. The waveform is definitely a sinusoidal revolving around 12V dc but there is much harmonic distortion as well as erratic spikes and dips. None of the networked units are booting with this. I cranked the DC offset up a bit to make sure the average voltage was adequate for the network...but alas, still no booting. It could be that the function generator is current limiting the DC source, in which case I am totally lost. It should be a maximum series resistance of two parallel 50 Ohm resistors I would think.

I might try the CT method of inducing the wave if I can find one around the office.

 

[MrAl]

Hello again,

Did you read my post about starting the units up in a given sequence instead of in random order? Forcing them to start one at a time may solve the problem.

 

[Maklaka]

I did, and I tried it just now. That actually worked for a single unit but unfortunately my power supply needed to be cranked to 26 volts to get the second to boot. That being said, I decided to try the CT method. Unfortunately, the CT - by virtue of being a coil - distorts the input sine pretty badly and despite my efforts to make some more windings, does not yield a satisfactory 2V peak to peak signal on the power line.

The gents are screaming about using a voltage follower to try to interface the function generator to the rest of the circuit with a lower impedance. Off to the lab with a hand full of Op-Amps!