555 PWM issue

So i have posted regarding my project I few times recently, but I have a new issue. I am trying to set up a 555 timer to generate PMW. The values I am using are as follows:
R1=10k pot
R2=1k resistor
C=.1uf

i used this website to determine my values and the schematic to follow.
Astable 555 Square Wave Calculator

When the pot approaches 0Ω the resistance exponetially decreases, but this doesn't really worry me. It is when I hit ≈300Ω the output voltage is 0v. The way I have it set up is that at 0 resistance the duty cycle should be at 50% and the output voltage should average at 6v. I am able to get the volts as low as ≈5v. The other thing is I have a 270Ω current limiting resisitor on the output.

Does any body know why this is happening?

Thanks,
Mike

You posted an article, not a schematic. It does not have a pot like you used so we don't know what you are talking about.
Please post the schematic that you used.

Firstly you need a 1k "stopper" on the pot.

audioguru said:

You posted an article, not a schematic. It does not have a pot like you used so we don't know what you are talking about.
Please post the schematic that you used.

Click to expand...

It has a schematic on it. It isn't really a article. I am not going to draw one up if that is what you mean. All it is going to be is a 555 outputting to a transistor. Just substitute the R1/R2/C for the values in my first post, then you will have a schematic.

@colin55
When you say 1k stopper you mean add a 1k resitor to the pot, so minimum resistance is 1k and max is 11k right?

That's what a "stopper" means.
Your posting is perfectly clear. The schematic justs needs a 1k.

I would also multiply the resistors by 10, and reduce the capacitor by 10. This will reduce the power dissipation in the resistors and inside the 555. I prefer not to use such low value resistors when setting the time constants in the 555.

Also, be advised that you cannot ever get a 50% duty cycle with the configuration you showed in the link. The timing capacitor charges through R1+R2, but discharges through only R2, making it impossible to get equal charge and discharge times. There is another way to get that, if you really need a 50% duty cycle.

Well wouldn't having no resistance between pin 8 and 7 give 50% duty. But really that is beside the point because 55% would work or 60% would work.

If i multiplied the resistors by 10 do you think the 1k would be fine. the 1k resistance will give a lower duty cycle with more variance so i guess that is better.

One sort of off topic question is there an easy way to measure capacitance. I bought a box of assorted caps, but the ones less than 1uf are labled. I have been figuring out what value they were based on size, but the ones less than .01uf are all the same size.

Thanks

Mike

The easiest way to measure capacitance is to buy a multimeter that does.

You can build a 555 astable with fixed 1% resistors, measure the frequency (or period), and work out what capacitor value from that. Look at page 8 of **broken link removed**. The equations for the charge time and discharge time are there... or solve the freq equation for C, and then plug in your 1% resistors...

mgeno216 said:

Well wouldn't having no resistance between pin 8 and 7 give 50% duty.

Click to expand...

If you have NO resistance between pin 8 and 7, you will blow up the discharge transistor. That is why you were told to put a minimum resistance in series with the R1 pot.

Look at the internal schematic and the max current spec for pin 7 on the **broken link removed**. If R1 goes to zero, you will have to determine that the maximum package dissipation is not exceeded (see note 7).

MikeMl said:

There is another way to get that, if you really need a 50% duty cycle.

Click to expand...

Is that true ?! using 555 can make 50% duty cycle ?