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18F4620 can blink LED in MikroC but not ASM

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Peter_wadley

New Member
Hey there,

I've just switched over to from 16F to 18F..

Having a bit of a problem though.

I'm doing the Hello World LED blink test but having problems.

I'm using the PICKIT2 to program.

I've been trying for hours to get an LED blink on Pin 0 of Port D with no luck.

When I program the µC to blink using mikroC it was fine.

But when I use the attached code in MPLAB it does not work..

I've tried selecting the bits from MPLAB rather then setting them in code...

You can even see the commented out section where I tried hardcoding the config bits to exactly what worked with MikroC....:confused:

I've tried everything it seems!! Anyone see anything wrong with the code?

Thanks!!

Code:
	LIST P=18F4620		;directive to define processor
	#include <P18F4620.INC>	;processor specific variable definitions

;******************************************************************************


;__CONFIG _CONFIG1H, 0xC2
;__CONFIG _CONFIG2H, 0x1E
;__CONFIG _CONFIG2L, 0x1F
;__CONFIG _CONFIG3H, 0x87
;__CONFIG _CONFIG4L, 0x81
;__CONFIG _CONFIG5H, 0xC0
;__CONFIG _CONFIG5L, 0x0F
;__CONFIG _CONFIG6H, 0xE0
;__CONFIG _CONFIG6L, 0x0F
;__CONFIG _CONFIG7H, 0x40
;__CONFIG _CONFIG7L, 0x0F

 __CONFIG  _CONFIG1H,  _OSC_HS_1H
 __CONFIG   _CONFIG2H, _WDT_OFF_2H
 __CONFIG   _CONFIG3H, _MCLRE_ON_3H
 __CONFIG   _CONFIG4L, _LVP_OFF_4L & _XINST_OFF_4L


CBLOCK	0x080
		
d1
d2
d3
		
ENDC
	
ORG	0x0000


Main:

CLRF TRISD 
CLRF PORTD

Start:

BSF PORTD,0
call delay
BCF PORTD,0
call delay

goto Start


delay
; Delay for 1 second using 20mhz clock
movlw	0x2D
	movwf	d1
	movlw	0xE7
	movwf	d2
	movlw	0x0B
	movwf	d3
Delay_0
	decfsz	d1, f
	goto	$+2
	decfsz	d2, f
	goto	$+2
	decfsz	d3, f
	goto	Delay_0
nop
retlw	0x00

goto Main
END
 

Attachments

  • Blink.asm
    1.1 KB · Views: 108
Last edited:

be80be

Well-Known Member
maybe this get it going
Code:
	LIST P=18F4620		;directive to define processor
	#include <P18F4620.INC>	;processor specific variable definitions

;******************************************************************************


;__CONFIG _CONFIG1H, 0xC2
;__CONFIG _CONFIG2H, 0x1E
;__CONFIG _CONFIG2L, 0x1F
;__CONFIG _CONFIG3H, 0x87
;__CONFIG _CONFIG4L, 0x81
;__CONFIG _CONFIG5H, 0xC0
;__CONFIG _CONFIG5L, 0x0F
;__CONFIG _CONFIG6H, 0xE0
;__CONFIG _CONFIG6L, 0x0F
;__CONFIG _CONFIG7H, 0x40
;__CONFIG _CONFIG7L, 0x0F

 __CONFIG  _CONFIG1H,  _OSC_HS_1H
 __CONFIG   _CONFIG2H, _WDT_OFF_2H
 __CONFIG   _CONFIG3H, _MCLRE_ON_3H
 __CONFIG   _CONFIG4L, _LVP_OFF_4L & _XINST_OFF_4L


CBLOCK	0x080
		
d1
d2
d3
		
ENDC
	
ORG	0x0000


Main:

CLRF TRISD 
CLRF LATD
movlw 0h
movwf TRISD

Start:

BSF PORTD,0
call delay
BCF PORTD,0
call delay

goto Start


delay
; Delay for 1 second using 20mhz clock
movlw	0x2D
	movwf	d1
	movlw	0xE7
	movwf	d2
	movlw	0x0B
	movwf	d3
Delay_0
	decfsz	d1, f
	goto	$+2
	decfsz	d2, f
	goto	$+2
	decfsz	d3, f
	goto	Delay_0
nop
retlw	0x00

goto Main
END
 

Pommie

Well-Known Member
Most Helpful Member
This is why I detest the use of goto $+n, try changing it to,
Code:
Delay_0
		decfsz	d1, f
		goto	Del1
		decfsz	d2, f
Del1		goto	Del2
		decfsz	d3, f
Del2		goto	Delay_0
		nop
		retlw	0x00
And all will work correctly. Look at the disassembly list to see why.

Mike.
 

Peter_wadley

New Member
WOW! Now that was something I was never going to find!!!

I seriously tried for 2 days more than I should have to get this to work!!

Thanks Mike! Karma++ to you!!

I looked at the disassembly and from what I could see the $+2 instruction jumped to locations that weren't in use..

Is this correct?

Why is this happening? What does the $ sign mean?

I have used this delay code generator for all of my 16F projects in the past without problems..

Microchip PIC, ASM Delay Code, Code Generator

is it that the 18F's just don't like this code?
 

be80be

Well-Known Member
It was jumping to two nops but your delay looked right mikes the man
 
Last edited:

Pommie

Well-Known Member
Most Helpful Member
The $ sign is used to represent the program counter and so goto $+2 jumps over the next instruction. However, on 18 series chips each instruction occupies two locations and gotos use 4. You can change the goto $+2 to goto $+6 but I prefer using labels.

Mike.
 

Peter_wadley

New Member
The $ sign is used to represent the program counter and so goto $+2 jumps over the next instruction. However, on 18 series chips each instruction occupies two locations and gotos use 4. You can change the goto $+2 to goto $+6 but I prefer using labels.

Mike.

aww I see..

So ... for 16F

if the program counter was at location 0x20
goto $+2 would tell the PC to go to 0x22? - skipping the instruction @ 0x21

but for 18F if this code was used, a byte of the 'goto $+2' instruction would actually be located @ 0x22 (since it started in 0x20) sending the PC into no man's land??

I'm I understanding this correctly?

so $+6 would work like...

goto $+6 ; is located @ 0x20
;0x20 ;is used by 'goto $+6'
;0x21 ;is used by 'goto $+6'
;0x22 ;is used by 'goto $+6'
;0x23 ;is used by 'goto $+6'

;0x24 ;first byte of instruction we want to skip
;0x25 ;Second byte of instruction we want to skip

;0x26 ; instruction we wanted to skip too

interesting!! 18F is a whole new animal it seems...

I just worked through transferring code from 16F to 18F which plays a short 5000 bit/second audio clip.

Since the 16F877a only had 8K of ROM
I wanted to use us the 18F4620 with 64K of ROM.

When I went to play the sound for the first time all of the high frequency was lost ... I realized I needed to change the computed GOTO statement since each retlw in the table use 2 bytes of ROM and not 1 like 16F. So I increased the offset by 2 after every byte is retrieved

I guess this would mean I can only use 32K this way.

In order to use the entire 64K I assume I will need to use the table read and write??
 

Peter_wadley

New Member
Also is it true that the fcall macro is no longer needed? which sets up the pclath reg properly before calling functions on a different page

here is the 16F code for the sound player (1bit,1pin setup)

Code:
#include <p16F877A.inc>
__CONFIG  _HS_OSC &   _WDT_OFF & _CP_OFF & _CPD_OFF & _LVP_OFF

     cblock 0x20
d1
d2
d3
Delay1               ; Define two file registers for the
Delay2               ; delay loop
bitCount
byteCount
blockCount
dataByte
OffsetH
OffsetL
endc

 ; the fcall macro
fcall	macro subroutine_name
	local here
	lcall 	subroutine_name ; set PCLATH correctly
	pagesel here 			; set PCLATH correctly - means?
here:
	endm  
  
org 0x00


bsf       STATUS,RP0     ; select Register Bank 1
bcf       TRISD,0        ; make IO Pin RD0 an output
bcf       STATUS,RP0     ; back to Register Bank 0


Start   clrf OffsetH
        clrf OffsetL

SoundLoop       
        fcall Table
		nop
		nop
		nop
		nop
        movwf dataByte
		
		movlw	d'8'
		movwf	bitCount

BitBang
		rlf		dataByte
		btfss	STATUS,C
		bcf		PORTD,0
		btfsc	STATUS,C
		bsf		PORTD,0
		call	delay

		decfsz	bitCount
		goto	BitBang
	

        incf OffsetL    ; add 1 to data pointer
        skpnz
        incf OffsetH

NoUp    movlw Low(d'8060')
        xorwf OffsetL,W
        skpz
        goto SoundLoop

        movlw High(d'8060')
        xorwf OffsetH,W
 	skpz
        goto SoundLoop
        fcall label


delay
		;998 cycles
	movlw	0xC7
	movwf	d1
	movlw	0x01
	movwf	d2
Delay_0
	decfsz	d1, f
	goto	$+2
	decfsz	d2, f
	goto	Delay_0

retlw	0x00	

;
; SOUND DATA TABLE
;
Table movlw   High(TStart)
        addwf   OffsetH,W
        movwf   PCLATH
        movlw   Low(TStart)
        addwf   OffsetL,W
        skpnc
        incf 	   PCLATH,F

        movwf   PCL     ;computed goto with right PCLATH
        				; end Table subroutine

TStart  
  ;-------------------------  0
     retlw b'10010110'   ; 96 
     retlw b'11000010'   ; c2 
     retlw b'10101111'   ; af 
     retlw b'00100100'   ; 24 
     retlw b'11010110'   ; d6 
     retlw b'00110011'   ; 33 
     retlw b'00110110'   ; 36 
     retlw b'10001100'   ; 8c 
     retlw b'11100101'   ; e5 
     retlw b'10010010'   ; 92 
     retlw b'11010101'   ; d5 
     retlw b'10001101'   ; 8d 
     retlw b'10010101'   ; 95 

..... 8060 retlw's in total (not included) ...

and the 18F code ... changes include:

1) RLF to RLCF for cycling the bits through the port
2) changing offset range from 8060 to 8060 x 2 = 16120
3) No need for fcall macro since 'call' can address 2MB ROM space
4)skpnc, skpnz, skpz, and skpc weren't defined anymore so had to use btfsc STATUS, C ... ect

Code:
	LIST P=18F4620		;directive to define processor
	#include <P18F4620.INC>	;processor specific variable definitions

;******************************************************************************


__CONFIG _CONFIG1H, 0xC2
__CONFIG _CONFIG2H, 0x1E
__CONFIG _CONFIG2L, 0x1F
__CONFIG _CONFIG3H, 0x87
__CONFIG _CONFIG4L, 0x81
__CONFIG _CONFIG5H, 0xC0
__CONFIG _CONFIG5L, 0x0F
__CONFIG _CONFIG6H, 0xE0
__CONFIG _CONFIG6L, 0x0F
__CONFIG _CONFIG7H, 0x40
__CONFIG _CONFIG7L, 0x0F


cblock 0x80
d1
d2
d3
Delay1               ; Define two file registers for the
Delay2               ; delay loop
bitCount
byteCount
blockCount
dataByte
OffsetH
OffsetL
endc

org 0x00

bcf       TRISD,0        ; make IO Pin RD0 an output

Start  clrf OffsetH
         clrf OffsetL

SoundLoop     
	
        call Table
        
	nop
	nop
	nop
	nop
        movwf dataByte
		
	movlw	d'8'
	movwf	bitCount

BitBang
		rlcf	dataByte		 
		btfss	STATUS,C
		bcf	PORTD,0
		btfsc	STATUS,C
		bsf	PORTD,0
		call	delay

		decfsz	bitCount
		goto	BitBang
	

        incf OffsetL    ; add 1 to data pointer
       	btfsc STATUS,Z
        incf OffsetH

	incf OffsetL    ; add 1 to data pointer
       	btfsc STATUS,Z
        incf OffsetH

NoUp    

movlw Low(d'16120')
        xorwf OffsetL,W
        btfss STATUS,Z
        goto SoundLoop

        movlw High(d'16120')
        xorwf OffsetH,W
 		btfss STATUS,Z
        goto SoundLoop
     
        call 	Start			; end


delay
			;998 cycles
	movlw	0xC7
	movwf	d1
	movlw	0x01
	movwf	d2
Delay_0
	decfsz	d1, f
	goto	$+6
	decfsz	d2, f
	goto	Delay_0

			
	nop
	nop

retlw	0x00	

;
; SOUND DATA TABLE
;
Table   

	movlw 	High(TStart)
        addwf   OffsetH,W
        movwf   PCLATH
        movlw 	Low(TStart)
        addwf 	OffsetL,W
        btfsc 	STATUS,C
        incf 	PCLATH,F

        movwf   PCL     ;computed goto with right PCLATH
        				; end Table subroutine

TStart  
  ;-------------------------  0
     retlw b'10010110'   ; 96 
     retlw b'11000010'   ; c2 
     retlw b'10101111'   ; af 
     retlw b'00100100'   ; 24 
     retlw b'11010110'   ; d6 
     retlw b'00110011'   ; 33 
     retlw b'00110110'   ; 36 
     retlw b'10001100'   ; 8c 
     retlw b'11100101'   ; e5 
     retlw b'10010010'   ; 92 
     retlw b'11010101'   ; d5 
     retlw b'10001101'   ; 8d 
     retlw b'10010101'   ; 95 
     retlw b'01001101'   ; 4d 
     retlw b'01011000'   ; 58 
     retlw b'11010101'   ; d5 
     retlw b'01100010'   ; 62 
     retlw b'10111010'   ; ba 
     retlw b'01010101'   ; 55 
     retlw b'01100011'   ; 63 
     retlw b'01010101'   ; 55
..... 8060 retlw's in total (not included) ...
 
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