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13.56 mHz RF Power Supply

akmetal

New Member
Hello Everyone,

I am new here and found this place serendipidously online looking for circuit diagrams/info/etc. I have picked this circuit to try to hone my circuit development skills, maybe this will help others as well.

This is an RF power supply, I think I have figured out the front end which is using d flip flops with a crystal oscillator to create the initial 13.56 MHz digital signal (this is where I was thinking of using an fpga with a crystal modified clock input) which is fed to a pair of amplifiers (I’m guessing these are power op amps) which is more or less a giant amplification chain to get to the mosfet gate which acts as an oscillator for a high power AC source?

So some confusion arises for me, are the 2 Vdd just the AC terminals (at 60 hz?) , I would think these would have to be DC other wise you would get some wierd convolution when you applied gate signals to the mosfet with AC across it? Also what is the purpose of the 2 capacitors to ground with an iron inductor between, are those just noise filters? What would happen if rfc1 and 2 were removed? So the tank circuit acts as a filter (assumed to be tuned to 13.56) to make sure only that frequency passes, what are C1 and C2 for? I might try my hand at doing the LC and C1 C2 voltage calc in time domain, freq is easier but have you ever found yourself in a situation where you finish the loop calc and can’t take the inverse Fourier transform?

1697589849384.png


I picked this as I would eventually like to build an RF sputter machine (since my understanding is that an RF sputter can do non metalics such as DLC coatings etc.

MicroSemi

IEEE



ACg8ocIa0TXjvIWk4Ll7p6OvDbYWNRy4wzvD588FcwVH02JgXA=s40-p
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So some confusion arises for me, are the 2 Vdd just the AC terminals (at 60 hz?) , I would think these would have to be DC other wise you would get some wierd convolution when you applied gate signals to the mosfet with AC across it? Also what is the purpose of the 2 capacitors to ground with an iron inductor between, are those just noise filters? What would happen if rfc1 and 2 were removed? So the tank circuit acts as a filter (assumed to be tuned to 13.56) to make sure only that frequency passes, what are C1 and C2 for?

Vdd is a DC source.

The pi network, 2 C's and an L, are a filter, along with RFC's, to keep RF out of the DC supply
and its circuits.

The C's to the output balun are to keep DC out of the balun transformer.


Regards, Dana.
 
which is fed to a pair of amplifiers (I’m guessing these are power op amps) which is more or less a giant amplification chain to get to the mosfet gate which acts as an oscillator for a high power AC source?
If you look carefully at the 3 ns risetime specs, +/- 0.5 ns skew spec, the > 100 MHz layout of this half-bridge layout, the thermal resistance of this design needs a heatsink = 0.024 K/W and understand what it takes, that it won't take much in deviations to make another design fail miserably.

It has no parameters similar to any power Op Amp. Given that the Half-bridge has no PSRR, line filtering is critical to prevent load-regulation errors. Skin effects, eddy currents and stray capacitance are kept in check with this layout, PCB design and component orientation.

Achieving 1.5kW output with this design is no small feat.
 
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If you look carefully at the 3 ns risetime specs, +/- 0.5 ns skew spec, the > 100 MHz layout of this half-bridge layout, the thermal resistance of this design needs a heatsink = 0.024 K/W and understand what it takes, that it won't take much in deviations to make another design fail miserably.

It has no parameters similar to any power Op Amp. Given that the Half-bridge has no PSRR, line filtering is critical to prevent load-regulation errors. Skin effects, eddy currents and stray capacitance are kept in check with this layout, PCB design and component orientation.

Achieving 1.5kW output with this design is no small feat.
Is there an easier way to achive a 13.56 mhz power supply for at least 1kw? What are the consequences of just using a normal AC RF supply if im not near anything that I could interfere with?

Is compliance to 13.56 creating the complication or would any frequency be an issue?

I was thinking about using a Peltier cooler for this, I have liquid-cooled computer cpus, cnc machines, etc. I am used to maintaining cooling systems. could an optical isolator be employed between the outputs of the power op amps and the mosfets or even between the pulse generator and the power op amps?

I am not quite following where the heat issue is, maybe the wave reflection between load and transformer if its not matched? I would think any significant heat would come down stream of the power op amp?

However, I dont want to get too far off in the weeds my main focus is on developing my circuit design intuition and possibly doing some modeling of the analog portion of the circuits (see if I can challenge myself to solve in the time domain), If i am going to generate DC from a wall outlet I would probalby use a full bridge with a capacitor to take out the ripple.
 
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Vdd is a DC source.

The pi network, 2 C's and an L, are a filter, along with RFC's, to keep RF out of the DC supply
and its circuits.

The C's to the output balun are to keep DC out of the balun transformer.


Regards, Dana.
Awesome, thank you so much, so in a way this is sorta almost like a VFD where we are taking some sort of outlet AC power converting it to DC then generating what ever intermediate frequency we want?
 
Know that the correct spelling is important. mHz is like milli-hurts ;) and units named after names like Watt are capitalized. Try to keep one space between the number and units so it is 1 kW rather than 1kw.

The interference comes from a poor layout affecting ESR, ESL, pF, eddy currents, strip impedance, saturated cores, and improper switched current skew balance.

It is not from outside is what I meant.
 
Awesome, thank you so much, so in a way this is sorta almost like a VFD where we are taking some sort of outlet AC power converting it to DC then generating what ever intermediate frequency we want?
You might become an illegal interferer if you choose the wrong frequency. 13.56 is an experimental license-free channel for such power supplies. https://www.wikiwand.com/en/ISM_radio_band
 
The full design specs for a similar unit, complete with inductor details and PCB layout, are in an app note here:

Edit - just realised you already have that via a different link..
Why would they have removed the tank circuit and the isolating capacitors upstream of the toroidal inductor in this schematic? Also its not clear where the DC VDD now comes in?

I do like the Smith chart lay out for impedance matching, thats another subject I have to master - I did find a cool channel where he writes an adaptive matching program so I became a patron -

But I know I can figure out the math - its taking a white piece of paper and developing a circuit thats the main goal and I have to understand why certian circuits are designed the way they are.
 
Why would they have removed the tank circuit and the isolating capacitors upstream of the toroidal inductor in this schematic? Also its not clear where the DC VDD now comes in?
It uses a direct push-pull drive to the centre tapped transformer primary, rather than the chokes as a DC path.

The "HV" point at the transformer centre tap is the main power in - up to 250V with that design.

The filtering and matching are done by the LC network after the transformer.

If you are interested in a more general approach and how/why things are designed as such, I'd suggest you look at some Ham Radio HF (short wave) power amp designs.

Some examples:


 
Know that the correct spelling is important. mHz is like milli-hurts ;) and units named after names like Watt are capitalized. Try to keep one space between the number and units so it is 1 kW rather than 1kw.

The interference comes from a poor layout affecting ESR, ESL, pF, eddy currents, strip impedance, saturated cores, and improper switched current skew balance.

It is not from outside is what I meant.
So are you referring to the EM fields from one trace creating a sort of parasitic inductance onto another trace? I would think that as things get packed tighter and tighter this is inevitable. When you look at the traces on any given circuit board there are rarely any complex impedance matching going on. As another poster stated the impedance matching would not be necessary until after the transformer to the load. Or maybe right upstream of the tank circuit?

Thank you again for the help, I am finding that this journey is most definitely a solitary one of just hunting and pecking through YouTube videos and other resources to pull it all together to develop my design intuition.

For some reason, this site will send very delayed emails of responses that happened long ago which triggered a few more thoughts.
 
TL:DR I must confess I did not read all your original links.

The IEEE link is preferable as a Current Mode Class D over the Microsemi design of VMCD with lower efficiency. It has stated the advantage of meeting both zero voltage switching (ZVS) and zero current switching (ZCS) conditions by proper design of the load network.

They don't specify the inductance of L coming from the HV source.
1699663709091.png

The Microsemi output filter assuming 1.2uF meant 1.2uH and the HV choke is at least 10x the resonant L.
1699661233926.png


The CMCD output filter using a rough simulation using Falstad below.

1699663394517.png


I know someone who produced DLC products, but I forgot how they did it. As I recall, it was HV DC-controlled plasma current in an inert vacuum.
 
TL:DR I must confess I did not read all your original links.

The IEEE link is preferable as a Current Mode Class D over the Microsemi design of VMCD with lower efficiency. It has stated the advantage of meeting both zero voltage switching (ZVS) and zero current switching (ZCS) conditions by proper design of the load network.

They don't specify the inductance of L coming from the HV source.
View attachment 143300
The Microsemi output filter assuming 1.2uF meant 1.2uH and the HV choke is at least 10x the resonant L.
View attachment 143298

The CMCD output filter using a rough simulation using Falstad below.

View attachment 143299

I know someone who produced DLC products, but I forgot how they did it. As I recall, it was HV DC-controlled plasma current in an inert vacuum.
Would this be the IEEE paper you are refering to - https://ieeexplore.ieee.org/document/6697329
 

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