12f629 - int on pin change, and tmr0 not working together...

[SnM]

I burned a project that had pin 3 of my 12f629 enabled for interrupt on pin change. I did this so I can put the pic to sleep, and wake it back up when a certian switch is enabled. it works great.

now I am rewriting the code so I can use the tmr0 feature. this is so I can have accurate timing thoughout my code. everything works fine in MPLAB with this enabled, and the interrupt on pin change disabled.

Now I decided to include the interrupt on pin change, but after I write my settings to the intcon register, INTCON bit 0 goes high (if pin 3 is high), and then goes to my interrupt routine. Even in my interrupt routine, I clear that bit, and it goes back to high as soon as I clear it. This is with the input high, and not changing states. it is treating it as the pin state has changed, every time, even though it has not.

I noticed if i don't enable the tmr0 interrupt, then it works fine. so i am thinking that either the interrupt on pin change, and tmr0 don't like to be set together, or maybe MPLAB has an issue???

Thanks.
steve

 

[sardineta]

check if inside the ISR_routine there are lines that check from where the interrupt is coming.


ISR_routine

btfsc INTF
goto RB0_int

btfsc T0IF
goto TMR0_int

etc...

 

[SnM]

Well I figured out a work around, but I still don't get it. I would have figured out what caused the interrupt in my interrupt sub routine, but i didn't get that far.

what i noticed was that the bit that goes high when a pin change happens is always high. even if i clear that bit, it come back at the next instruction cycle, and that is without any additional pin changes....

 

[sardineta]

ok at INTCON register

GIE, and RBIE have to be 1 in order you to have the interruption enable,
any change on RB4, RB5 RB6 and RB7 will fix RBIF be 1,
so you have to check it, or change this interruption pin by using RB0.

even if you have cleared RBIF inside the ISR routine it will be 1 if something happens so it will be called again.

TMR0 has no problem, it will call ISR routine every time it overflows.

what do you want to do?
how many external interruptions are you handling ?

sorry for the delay

 

[SnM]

actually the problem is that the GPIF bit gets set after I clear it with no changes to any of the pins. not sure why...... could it be something wrong with MPLAB?

 

[Nigel Goodwin]

actually the problem is that the GPIF bit gets set after I clear it with no changes to any of the pins. not sure why...... could it be something wrong with MPLAB?

Try it in a real PIC, a simulator is just that, it's not like the real world. Certainly in the older PIC simulators there were various limitations, but I've not used one this century :lol:

 

[sardineta]

mmmm I do not know, if mplab has mistakes

read page 19 of the datasheet
also read page 13 and 21

GPIF is set when GP5:GP0 has changed, the datahseet says something important on page 21 in the gray box

you have to configure also IOC register
in summarize
INTCON
OPTION_REG
TRISIO
WPU
IOC

check if you are on the correct bank, everytime you set or clear a bit flag or register, always work on bank 0, go to bank 1 when needed by a register

 

[SnM]

everything appears to be setup correctly. i'll have to double check tomorrow.... i'll post back what i find.

thanks