Urgent~engineering question~

[cly_1018]

hw 2 design a 4 bit-counter(0-15) by using J-K Flip-flop..
-need to use 74ls192 decoder n 7-segment display(anode) in practical
-the result wil be display like a digital clock..

here is the reference website of it..
YouTube - Digital Clock BY 74ls192 BCD counter

i wan the result something like it..

thanks

 

[MikeMl]

Why is it urgent?

 

[Vizier87]

probably an assignment that needs to be handed tomorrow.
you've mentioned those ICs, search for the datasheet, and come again if you have any problems.

 

[cly_1018]

Why is it urgent?

i wan it by Monday le...

 

[cly_1018]

probably an assignment that needs to be handed tomorrow.
you've mentioned those ICs, search for the datasheet, and come again if you have any problems.

den hw to do it by theory??
-using sequential circuit design method
-truth table(present state, next state, flip-flop A to H), flip-flop A to H is use excitation table 2 state it
-k-map
-circuit diagram

 

[vinodquilon]

For asynchronous mode of counting it is simple to construct a ripple counter using 4 JK and feeding following clocks with preceding outs.

 

[cly_1018]

For asynchronous mode of counting it is simple to construct a ripple counter using 4 JK and feeding following clocks with preceding outs.

can u pls teach me hw?
i nid 2 do hw many flip-flop?

 

[vinodquilon]

Using 4 FFs you can count 2^4 states. Tie J & K inputs to +5V for all FFs. Connect external clock to first FF clock in. Following FFs clocks must feed with preceding outs.

 

[cly_1018]

Using 4 FFs you can count 2^4 states. Tie J & K inputs to +5V for all FFs. Connect external clock to first FF clock in. Following FFs clocks must feed with preceding outs.

J & K inputs is mean wat?