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The ADFM (bit 7 ) of ADCON1 register

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micropad

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Dear All
The ADFM (bit 7 ) of ADCON1 register is used for result justification. please advice me what is the benefit this justification and what kind of Technic we can use, using this justification
This is reference to 16f877a MCU
Please advice
Thanks in advance
 
Dear All
The ADFM (bit 7 ) of ADCON1 register is used for result justification. please advice me what is the benefit this justification and what kind of Technic we can use, using this justification
This is reference to 16f877a MCU
Please advice
Thanks in advance

hi,
If the A2D output is left justified into the ADRESH register, reading the BYTE from the ADRESH register it will give a count value of 0 to 255 for a +5V input when a Vref of +5V is used.

Right justified will give a value in the ADRESH and ADRESL registers, reading the WORD from these two registers will give a count value of 0 to 1023 for a +5V input when a Vref of +5V is used.
 
hi,
If the A2D output is left justified into the ADRESH register, reading the BYTE from the ADRESH register it will give a count value of 0 to 255 for a +5V input when a Vref of +5V is used.

Right justified will give a value in the ADRESH and ADRESL registers, reading the WORD from these two registers will give a count value of 0 to 1023 for a +5V input when a Vref of +5V is used.

Dear Sir Thanks for reply But I am not yet well understand
 
Dear Sir Thanks for reply But I am not yet well understand

Basically it just makes it very easy to use the ten bit A2D as an 8 bit A2D.

To read ten bits requires two reads in different banks, this bit allows you to read the top 8 bits (giving 8 bit resolution) in a single read from a single bank.
 
Basically it just makes it very easy to use the ten bit A2D as an 8 bit A2D.

To read ten bits requires two reads in different banks, this bit allows you to read the top 8 bits (giving 8 bit resolution) in a single read from a single bank.

Dear Mr Nigel, Thanks for clear reply
I need verify a little more about ADC, as I know The ADC module can drive even in SLEEP mode. So in the SLEEP mode Fosc is stopped, if Fosc is stopped, how ADC is functioning In SLEEP mode
please help
 
It will cause a interrupt when done with conversion that will wake the pic from sleep

It's like this the cap charged up interrupt fires and the clock starts running to send the value out.
 
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Basically in left justified mode, you get the upper 8 bits of the 10 bit ADC result in ADRESH.

In right justified mode you get the lower 8 bits of the 10 bit ADC result in ADRESL.

Left justified gives you a more "coarse" resolution whereas right justified will give you a more "fine" resolution.
 
It will cause a interrupt when done with conversion that will wake the pic from sleep

It's like this the cap charged up interrupt fires and the clock starts running to send the value out.

Dear be80be,
Thanks for reply
I need to know a little thing, The ADC interrupts fire after the conversion. so I am asking how is ADC process done while in the SLEEP mode, because Fosc is nun functioning in the SLEEP mode
Please Help
 
The ADC can only cause an interrupt during sleep if the internal oscillator is used. See the relevant data sheet.

Mike.
 
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It will cause a interrupt when done with conversion that will wake the pic from sleep

It's like this the cap charged up interrupt fires and the clock starts running to send the value out.

Dear be80be,
Thanks for reply
I need to know a little thing, The ADC interrupts fire after the conversion. so I am asking how is ADC process done while in the SLEEP mode, because Fosc is nun functioning in the SLEEP mode
Please Help
 
Dear be80be,
Thanks for reply
I need to know a little thing, The ADC interrupts fire after the conversion. so I am asking how is ADC process done while in the SLEEP mode, because Fosc is nun functioning in the SLEEP mode
Please Help

Please see Pommie's post -

Pommie said:
The ADC can only cause an interrupt during sleep if the internal oscillator is used. See the relevant data sheet.

Mike.

Don't go reposting what you posted 2 hours ago as if the person with the answer you're looking for said nothing at all. That's just plain rude.

Moreover....you could've found your answer by simply taking a couple of minutes to pull up the datasheet and consult the "A/D Operation During Sleep" section of it -

**broken link removed**

If you're gonna post questions requesting help, make sure you're putting in the effort to learn on your own first (don't even try to tell us you read the data sheet because if you had you would've seen this and not have needed to ask the question). More people would be more inclined to help you when they can see that you're putting in the effort to learn on your own rather than just asking for free answers.
 
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It has to use FRC and be in sleep

Operation in Sleep mode requires the A/D FRC clock to
be selected. If bits ACQT2:ACQT0 are set to ‘000’ and
a conversion is started, the conversion will be delayed
one instruction cycle to allow execution of the SLEEP
instruction and entry to Sleep mode. The IDLEN bit
(OSCCON<7>) must have already been cleared prior
to starting the conversion.
 
The ADC has it's own internal oscillator that has to be selected, see the data sheet for details.

Edit, missed both your replies above.

Mike.
 
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Wow...apparently someone likes to ignore posts.

I posted THE SPECIFIC PAGE IN THE DATASHEET THAT TALKS ABOUT ADC OPERATION IN SLEEP EVEN!!! And you're acting as if the information hasn't even been posted!?!?!?
 
Jon he has been reading the data sheet "problem is solved" micropad glade to hear that.
 
Jon I meant when he said problem solved if he had been reading one it wouldn't have took 17 post to get to problem solved.
:D:D
 
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