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Papabravo said:
I *assumed* that the PIC automatically provides the CS line in master mode, and in doing , would only stay low for a byte transfer, then move back up to idle high. The reason I didn't know the PIC doesn't implement the CS automatically in master mode is that I never used it, I just control it manually anyway. After going through the datasheet it seems its only needed by the hardware when in slave mode, in master mode, one has to produce their own CS line.void spi_write(unsigned char txdata1, unsigned char txdata2)
{
unsigned char rxdata, rxdata1, rxdata2;
CS = 0; //chip select
rxdata1 = SSPBUF; //lose data in buffer
SSPBUF = txdata1; //write the first MAX3100 control byte
//0b10000000
while(!STAT_BF); //loop until buffer contains data
rxdata1 = SSPBUF; //retrieve data
SSPBUF = txdata2; //write the second MAX3100 data byte
while(!STAT_BF); //loop until buffer contains data
rxdata2 = SSPBUF; //retrieve data
CS = 1; //de-select chip
}
void spi_puts(const char *str)
{
while(*str){
//putch(*str);
spi_write(0b10000000, *str);
str++;
}
} rxdata1 = SSPBUF; //clear BF
do{
SSPCON_WCOL=0; //clear WCOL
SSPBUF=txdata1; // write data
}while(SSPCON_WCOL); // if collision do it again
while(!STAT_BF); // wait for transfer to finish
rxdata1 = SSPBUF; // clear BF for next transfer
do{ // do next bytevoid spi_init()
{
STAT_CKE = 1;
spi_write(0b11000100, 0b00001011);
while(spi_ready(0b01000000, 0b00000000));
}
