Nand

[quiksilver519]

Hey everybody,
If you were put 3 volts into input A of a NAND Gate and 4 Volts into input B, what would the output be?

Thanks

 

[RCinFLA]

Depends on what type of IC and Vdd voltage. For CMOS the threshold is approximately half the Vdd supply voltage so the example would be both logic '1's on input for a 5 vdc Vdd supply. If is was 4000's series CMOS with 15 vdc Vdd then both would be logic '0'

For old 5v TTL gates its approximately >2.7 vdc for an assured logic 1 and <0.2 v for an assured logic 0.

In real world with high frequency clocking there is some ringing during transitions so CMOS generally recommends <20% of supply for logic low and >80% of supply for logic high.