Digital Audio Delay

[Roff]

Hi Guys,
I've been very active in answering questions on other forums here, but I think this is my first question. :shock:
I've never done a project with a microcontroller. I'm wanting to make a variable audio delay (about 2.5 seconds max) using SRAM as a variable-length circular register, and using a PIC (or other uC) for address generation (probably 18 bits) and read/write control. The read/write would need to be perfectly periodic (say 10usec), while the address generation timing could be a little sloppy if need be. I would also want to monitor a delay up/down momentary switch, maybe on a comparator or A/D input, and use that to increment or decrement the point where the address rolls over to zero.
Can all this be done using a PIC or AVR? My primary concern is the need for the read/write timing to be precisely periodic. If that is impossible, I can use the uC to control a counter which addresses the SRAM.
Having said all that, does anyone know of hardware that is simpler than this? I have seen several audio delay chips, but none seem to do quite what I want.
BTW, I can handle the A/D - D/A portions of the project.

 

[bmcculla]

You should get a uC that has a built in external memory interface. The AVR ATMega64 has one. A lot of 8051s have memory interfaces also. This hardware generates the timing and reads and writes to the memory with one intruction. If you need fast acceses look for a non-multiplexed bus.

For 18 bits you'll need to have some bank select lines (most 8 bit controllers only support 16 bit addresses). These bank select lines can just be regular port pins. This lets you use the memory in chunks addresed in 16 bits.

So the controller would read the A to D write value to memory then read output from memory and output to D to A. There are a lot of AtoDs and D to As that can be memory mapped and read and written to like SRAM using the same memory interface. All the control and timing would be done in software with no external counters. Maxim makes 8051s with 2 address registeres that are designed to make circular buffers easy.

A rotary encoder might be a good choice for your user input - fairly cheap and only need 2 digital lines.

If you want to generate the addresses with a counter a CPLD might be a better choice. All the timing and address generation can be done in one chip.

 

[williB]

Ron welcome .lol..we are glad to have you.. :wink:
ok the sample rate can ONLY be precicely controlled by a seperate clock ..
I would use a seperate A/D converter ,how accurate?? ten bits ?
i have seen this done on Circuit cellar maybe try search "Circular buffer "on their site .
anyway this clock (an oscillator chip) could be divided down with counters to give multiple sample rates, feed this into the conversion start of the A/D converter you could use whatever method you like to collect the data..

 

[Roff]

Thanks for the replies, guys. If you remember my posts from any of the other forums, you'll know that I'm primarily an old analog engineer. I have a fair amount of logic design experience, but none with uC's.
I'm actually planning to use delta modulation (search CVSD) for the A/D, which yields a one bit audio stream (think AM radio for audio quality). I started out looking at a 256kX1 Cypress SRAM, but it dissipates too much power for my liking. I'm thinking of using a 32kX8 lower power part instead, and since I only have one data bit, I think I can use 3 bits of the 18 bit address bus to demux the data input and mux the output, effectively making it a 256kX1 part. Does that make sense?
Brent, I was planning to read and then write to the same address, then increment the address. The delay would be controlled by the "length" (circumference?) of the circular register. That way I wouldn't need separate read and write addresses, with a variable offset.
I'll take a look at the ATMega64, and the 8051's also. Thanks for the suggestions.
Regarding fast accesses - 10usec sounds slow to me, even for a microcontroller. Am I mistaken?
I like the rotary encoder idea, but I'll bet it ain't as cheap as a center-off, momentary SPDT switch. Plus, I think the human interface would be better. I would need a pretty stiff detent on an encoder (maybe they come that way?). With the switch, I would need to select one of 3 voltages with the switch, and feed the result to two comparators or to an A/D input.
Thanks again, guys. If you or others have more input for me, I'm open to it.

 

[Nigel Goodwin]

Thanks for the replies, guys. If you remember my posts from any of the other forums, you'll know that I'm primarily an old analog engineer. I have a fair amount of logic design experience, but none with uC's.
I'm actually planning to use delta modulation (search CVSD) for the A/D, which yields a one bit audio stream (think AM radio for audio quality). I started out looking at a 256kX1 Cypress SRAM, but it dissipates too much power for my liking. I'm thinking of using a 32kX8 lower power part instead, and since I only have one data bit, I think I can use 3 bits of the 18 bit address bus to demux the data input and mux the output, effectively making it a 256kX1 part. Does that make sense?

I don't quite see why you want only one bit?, presumably you're using 8 bit A2D and D2A?, so what do you do with the other 7 bits?.

Brent, I was planning to read and then write to the same address, then increment the address. The delay would be controlled by the "length" (circumference?) of the circular register. That way I wouldn't need separate read and write addresses, with a variable offset.
I'll take a look at the ATMega64, and the 8051's also. Thanks for the suggestions.
Regarding fast accesses - 10usec sounds slow to me, even for a microcontroller. Am I mistaken?

It depends on the clock speed, a 4MHz PIC takes 1uS per instruction, likewise at 20MHz it takes 200nS per instruction.

 

[JohnBrown]

Nigel Goodwin wrote:

I don't quite see why you want only one bit?, presumably you're using 8 bit A2D and D2A?, so what do you do with the other 7 bits?.

He said he wants to use CVSD (that's continuously variable slope delta).
The encoded data is a stream of single bits. I believe Harris used to make chips for this, I think it was a system used in telecomms a while back.
Basically, a '1' bit means increase amplitude, and a '0' means decrease, so silence is represented by alternating '1's and '0's. Each time a '1' follows another '1', or a ')' follows another '0', the delta is increased according to some algorithm. The idea is that it is possible to reproduce fairly high frequencies at fairly low amplitudes, and vice-versa. Early forerunner of psycho-acoustic compression?

@Ron H
Are you intending to do this encoding/decoding using the micro, or will you use external codecs?

 

[Roff]

Nigel Goodwin wrote:

I don't quite see why you want only one bit?, presumably you're using 8 bit A2D and D2A?, so what do you do with the other 7 bits?.

He said he wants to use CVSD (that's continuously variable slope delta).
The encoded data is a stream of single bits. I believe Harris used to make chips for this, I think it was a system used in telecomms a while back.
Basically, a '1' bit means increase amplitude, and a '0' means decrease, so silence is represented by alternating '1's and '0's. Each time a '1' follows another '1', or a ')' follows another '0', the delta is increased according to some algorithm. The idea is that it is possible to reproduce fairly high frequencies at fairly low amplitudes, and vice-versa. Early forerunner of psycho-acoustic compression?

@Ron H
Are you intending to do this encoding/decoding using the micro, or will you use external codecs?

I haven't decided.
Nigel, for more info, search "CVSD audio delay".

 

[bmcculla]

If you have an external converter generating your one bit bitstream you could use the USART on the micro in syncronous mode to capture your bit stream and pack it into 8 bit chunks to write to memory. In syncronous mode the USART is designed to read 8 bit clocked serial data - perfect for what you are trying to do. This way you only need a memory read or write every 8 bits. You could clock your output bitstream with the same USART too.

It seems like it wouldn't be too hard to make your own encoder with a comparator, clock, and sample and hold. The micro generates the clock which clocks the sample and hold and the USART. A current source and cap would make a decent output for a decoder.

The fast acccesses I talked about earlier have to do with multiplexed vs. non-multiplexed memory busses. Multiplexed busses save micro pins but require an external register and an extra clock cycle for the memory access.

If you buy a rotary encoder with detents they actually produce a very satisfying click each tick- like the scaling and timebase adjustment on a digital scope. You could use a differential adjustment to speed up the UI - slow turns = slow adjustment, fast turns = greater change per click.

Brent

 

[Roff]

If you have an external converter generating your one bit bitstream you could use the USART on the micro in syncronous mode to capture your bit stream and pack it into 8 bit chunks to write to memory. In syncronous mode the USART is designed to read 8 bit clocked serial data - perfect for what you are trying to do. This way you only need a memory read or write every 8 bits. You could clock your output bitstream with the same USART too.

It seems like it wouldn't be too hard to make your own encoder with a comparator, clock, and sample and hold. The micro generates the clock which clocks the sample and hold and the USART. A current source and cap would make a decent output for a decoder.

The fast acccesses I talked about earlier have to do with multiplexed vs. non-multiplexed memory busses. Multiplexed busses save micro pins but require an external register and an extra clock cycle for the memory access.

If you buy a rotary encoder with detents they actually produce a very satisfying click each tick- like the scaling and timebase adjustment on a digital scope. You could use a differential adjustment to speed up the UI - slow turns = slow adjustment, fast turns = greater change per click.

Brent

Good stuff, Brent.