workings of a 74LS90 chip : theory

[cls_tec]

Ok, I am "basement builder." I am almost done building a clock(a very common project).

Now, I wanted to understand more about the chip 74LS90 itself.
So, the chip has two AND gates (pin2,3=reset 0, pin6,7=reset 9).
The chip can count anything from 2 to 10 by connecting the appropriate output pins(QA,B,C,D) to the pins 2,3 to get a count from 0 to X.

So, for example, If I connected QB,QC to pin 2,3 , then I would get a modulo 6 count. That's because 6 in binary is 110. so B,C would be logic1 then, causing the pin2,3 AND gate to have output=1 , therefore resetting the counter to 0.

Here is my "question." Why do I see many designs that have external AND gates for doing the same thing rather than using the internal AND gate? Is there something else I am not seeing?

 

[blueroomelectronics]

Post the design in question.

 

[eblc1388]

So, for example, If I connected QB,QC to pin 2,3 , then I would get a modulo 6 count. That's because 6 in binary is 110. so B,C would be logic1 then, causing the pin2,3 AND gate to have output=1 , therefore resetting the counter to 0.

Here is my "question." Why do I see many designs that have external AND gates for doing the same thing rather than using the internal AND gate? Is there something else I am not seeing?

Yes, you can do that and gets a modulo 6 counter. You don't need an extra AND gate.

Now the problem is: How can you clear the counter when QB and/or Qc is not zero? The counter will runs and reset to zero after reaching 6, but you cannot clear it whenever you want.

In short, you have lost the capability to clear the counter.

 

[cls_tec]

here is the design :

**broken link removed**

Thanks for the reply. That makes sense, I guess if the application was just a clock which wouldnt need resetting to "wherever you wanted" then you wouldnt need that external AND gate.

But for more complex applications, you would need that function, too.


Thanks very much

 

[MrAl]

Hi,

There are a few problems with that design you linked to.

One, the 'hours' counter needs to be a 74LS93 if this is to count
to 12 hours (74LS90 only counts to a max of 10).
Second, there is no AM/PM indicator (that would have to be added).
Third, in this particular design apparently the designer didnt realize
that you can use the internal AND gate to reset on a count of 6
(useful for wall clocks) and also that you DONT need to reset manually
at a count of 10 for modulo 10 count, so those AND gates can be
eliminated also with no extra wiring required.

Another little problem is diodes shouldnt really be used to provide
additional logic functions, as is being done in this design. It works
sometimes though, and a little better if Schottky diodes are used,
but even better is to use regular logic gates.


As others pointed out, some designs require the count to reset
at some other count that can not be detected with a 2 input
AND gate (such as reset on a count of 7) so then an external
AND gate would be required.