who can explain more on this circuit....pls help me!!!

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R1, C1 & IC1a provide Power On reset. IC2 & 3 are counters. IC2 has an ocsillator - the timing is set by R2, R3 & C2.

Sw1 selects the time delay. IC1c modulates the buzz.
 
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Now I've had more time to study the circuit.

IC2 divides the oscillator frequency by 128. IC3 counts this frequency and when the count reaches the point set by Sw1, the output of IC1c starts pulsing at the oscillator rate. IC1d inverts these pulses and, when high, Q1 is turned on thus activating the buzzer. The pulses via R4 and D1 eventually discharge C1 thus causing the counters to be reset. Thus the timing starts again.
 


what do you mean that IC2 divides the oscillator frequency by 128?
 
ic2 is an oscillator cum ripple counter with different division taps , here it is used as /128 mode . read the datasheet of 4060
 
drinalds said:
what do you mean that IC2 divides the oscillator frequency by 128?
If the oscillator frequency was say 1000 Hz, then the output would be 1000/128 = 7.8 Hz

So if you want say 1 second increments, then set the oscillator to 128 Hz so the output will be 1 Hz. Then Sw1 will allow you to chose the delay in 1 sec increments.
 
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