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What does a Dual Decade Binary Counter do??? Please help.

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Iawia

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I am trying to implement a seven segment display using a tlc555 timer as the clock input to my counter. i realized that the counter is a 'dual decade binary counter' (NTE74HC390). i want the display to simply count from 0-9 on each pulse.

looking at the diagram of this ic online, it has two clock inputs for each 4 bit output. why? can i still use this as a simple counter???
 
Do you want to count up from 0 to 9 or count up from 0 to 99?

A better choice to count up or count down would be a chip like the 74192 and if you want two digits (00 to 99 or 99 to 00) you would cascade two counters. Each has a BCD output so you would need a BCD to 7 segment decoder driver. The nice thing about a chip like the 74192 is it is programmable so you are easily able to count up or down from any number between 00 and 99. The chip you mention can be used to count from 0 through 9 using 1/2 the chip. It just doesn't seem to me to be a good choice for what you seem to want to do. Maybe another forum member has some thoughts?

Ron
 
I've used the 74192 with a 7447 to feed 7-segment displays. It's a good choice if you need to count in both directions or need to load a starting number. The 74390 is more counter than you need but it will work. I've never heard of a counter that would count to 10 on its own without a clock pulse for each count though.
 
"dual decade binary counter" is a poor description. A binary counter counts from 0000 to 1111 in binary; a decade counter counts from 0000 to 1001 in binary coded decimal (BCD). The problem with the 74192 BCD counter (I use it in 75% of my TTL applications) is that it isn't fully synchronous. Reset and parallel load are asynchronous functions (same with the binary 74193). And when you cascade the counters, individual conters are synchronous, but the chain is not as it's a ripple carry. If you're going to insist on synchronous operation, use the 74160-series of counters as they count, reset and parallel load synchronously.
 
For least chip count use a CD40110. It's a decade up/down counter with a direct 7-segment display output.
 
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looking at the diagram of this ic online, it has two clock inputs for each 4 bit output. why? can i still use this as a simple counter???


yes you can use this IC but for display you need a display driver IC to decode Binary to 7 segment..
 
Still the question remains

I am glad I joined this forum because it seems there are a lot of knowledgeable people here.

However, my question still remains unanswered. I still don't understand the use of a dual decade counter over a decade counter. Namely, there are two clock inputs for each 4 bit output. When I read the specs on this chip, it is extremely vague about what each clock input is doing. I am still fairly new to the ttl world so that may have something to do with it.
 
I am glad I joined this forum because it seems there are a lot of knowledgeable people here.

However, my question still remains unanswered. I still don't understand the use of a dual decade counter over a decade counter. Namely, there are two clock inputs for each 4 bit output. When I read the specs on this chip, it is extremely vague about what each clock input is doing. I am still fairly new to the ttl world so that may have something to do with it.

The chip in question is a dual decade counter / divider. What that really means and you can see in the data sheet is we have two decade counters in a single package. Doing this with circuits is common. We can have 1, 2 or even 4 operational amplifiers in a single case (package) or for example a 555 timer is a single timer but a 556 is actually two 555 timers in a single package.

Back to the chip at hand. Depending on how a single decade counter is built it can divide. In the case of this chip, using half the chip, a single decade counter, it can divide a clock by 2, 4, 5 or 10. Since it is a dual decade counter we can now divide by 2, 4, 5, 10,
20, 25, 50 or 100 as covered in the data sheet. That is the advantage of two counters in a single package. Less space used.

This particular counter is what is called a "ripple" counter. Drop a pebble in the center of a pan of water. Note how the ripples travel.

Counters are a collection of flip flop circuits in this case. Each flip flop has two states, it is a 0 or 1. Give this link a read to understand using flip flop circuits to count. Note where it talks about Asynchronous (ripple) counters to understand the ripple effect. That should help.

So what you have is just two counters in a single package. If I want to divide a clock down by 100 it is simpler to use one chip rather than two divide by ten chips.

Does that help?

Ron
 
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