Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Voltage controlled capacitor discharge rate. How do I do this?

Status
Not open for further replies.

HexInverter

New Member
Hey guys!

I am hoping someone will be able to assist me with this circuit.

I am looking to control the rate of discharge from a capacitor with voltage. I have tried to implement a voltage-controlled current sink as per the LM3900 Norton Amplifier datasheet:

currentsink-png.70287


In essence, I want to be able to voltage control the rate of decay of a simple voltage envelope generator made by charging and discharging a capacitor.

Ideally,

Less voltage = longer discharge
More voltage = faster discharge times

I experimented with this circuit a bit without the capacitor and got consistent results from 0mA to approximately 10.5mA when using 0-12V voltage control, all good so far! That was measured with my multimeter.

But, when I connected the capacitor and charged it, then used the LM3900 to sink current from it, all sorts of interesting behaviour happened. The LM3900 seems to discharge the capacitor to a certain voltage, and then stop. I can vary the end voltage it discharges to by varying the voltage input.

Can anyone shed some light on what is happening here, or what I am doing wrong?

Thanks so much for any help :)
 

Attachments

  • currentsink.PNG
    currentsink.PNG
    59.3 KB · Views: 3,698
The principal seems ok. What does your circuit look like? What size cap, voltage and discharge time are you looking for?
 
The circuit can't discharge the voltage at Q1's collector below the reference voltage at the plus (+) input of the op amp.
 
The principal seems ok. What does your circuit look like? What size cap, voltage and discharge time are you looking for?

Hiya! Thanks for the response.

Here is the basic circuit I am working with. The capacitor is charged by a quick trigger pulse and then the trigger is removed, allowing the cap to discharge. The idea is to have the discharge rate voltage controllable.

capcharge-png.70289
 

Attachments

  • capcharge.png
    capcharge.png
    2.2 KB · Views: 2,019
The circuit can't discharge the voltage at Q1's collector below the reference voltage at the plus (+) input of the op amp.

Ahhh! I figured it might be something to do with the voltage, as the voltage it would discharge to seems to vary with the voltage at the input.

Okay, so given that, do you have a clever suggestion as to how I can overcome or counteract this feature?

Thanks for the responses gentlemen!
 
Voltage controlled current sinks are commonly used to test power supplies. In fact, there is a thread on that topic going on right now.

Look through this: https://www.electro-tech-online.com/threads/dummy-load-ii.132379/

I don't have time right no to find the post that has the basic circuit. You won't need the multiple channels to handle the massive power that that thread covers, but a single channel scaled to your power requirements should do nicely.
 
...
Here is the basic circuit I am working with. The capacitor is charged by a quick trigger pulse and then the trigger is removed, allowing the cap to discharge. The idea is to have the discharge rate voltage controllable.
...

You could use a FET to discharge the cap, as the FET D-S will act like a resistor, and the resistance is based on the FET Gate voltage.

It won't be a perfectly linear relationship of gate voltage to resistance, but it is adjustable and might suit your needs.

Then of course you could just use a pot to discharge the cap, and adjust the pot?
 
Ahhh! I figured it might be something to do with the voltage, as the voltage it would discharge to seems to vary with the voltage at the input.

Okay, so given that, do you have a clever suggestion as to how I can overcome or counteract this feature?
Reducing the value of R5 will reduce the minimum voltage for a given current, but you obviously can't reduce it completely to zero with that circuit.

If you connected R5 to some negative voltage, then you could discharge the capacitor to zero volts (or below).
 
Thank you for the responses guys!

Sorry for the slow response on my end -- other projects have been eating up my time.

Okay, I'm back at it again. I have tried a 2N5457 FET configured as a voltage controlled resistor, but the results aren't what I would like.

There is not a really large amount of adjustment. Doing some tests from the drain of the FET to GND without the capacitor connected shows resistance adjustment from about 70R to 300R, which is not enough of course.

I need discharge time adjustment via voltage control of about 10mS to approximately 1 second. (give or take).

Here is the schematic as it sits currently. I must be doing something terribly wrong here! :confused:

Thank you for any help, gentlemen!!!

fetvcr-png.70366
 

Attachments

  • fetvcr.png
    fetvcr.png
    1.4 KB · Views: 1,793
Reducing the value of R5 will reduce the minimum voltage for a given current, but you obviously can't reduce it completely to zero with that circuit.

If you connected R5 to some negative voltage, then you could discharge the capacitor to zero volts (or below).

Thanks for the response! I tried connecting R5 to -5V instead of GND, but it still seemed to function the same. Hmph...
 
What is the range of discharge currents you are aiming for?

It doesn't have to be high current at all. It just needs to create a voltage envelope that has a voltage-controllable decay time.

I need a discharge current adjustment of approximately 0.12 - 12mA for the times I am looking for (~10mS -> 1S of adjustment)

Thanks for any help :)
 
Does the cap have to discharge to exactly 0V?
What is the source ofthe pulse that charges the cap?
Telling us what you are trying to do (the big picture) would really help.
 
Does the cap have to discharge to exactly 0V?
What is the source ofthe pulse that charges the cap?
Telling us what you are trying to do (the big picture) would really help.

It does not have to charge to exactly 0V. However, it does have to discharge to a consistent value (so that I can apply a fixed offset somewhere in the signal chain down the line to compensate).

The source will be a comparated input jack which a user plugs a digital signal in of varying duration to generate a decay cycle from. It could be a very short duration pulse or a very long one. It would hold the cap charged until released, then a voltage-controllable decay cycle would commence.

The target application is a percussion generator for musical synthesis. The desired decay envelope is controlling a voltage controlled amplifier which modulates the volume of a percussion sound. The system works with various control voltages so it is desired to have the decay length voltage-controllable to produce cool musical effects.

Hope that helps :) Cheers!
 
Maybe something like this?
 

Attachments

  • ccshort.png
    ccshort.png
    118.2 KB · Views: 353
  • csource.png
    csource.png
    119.4 KB · Views: 315
  • cclong.png
    cclong.png
    117.6 KB · Views: 303
Maybe something like this?

Okay -- I have tried this out and it appears to work for a short duration. After awhile though, the circuit begins to malfunction and the opamp starts burning up. Any idea why this is happening? I've looked over the circuit a few times and do not believe I breadboarded it wrong.

I am using a TLC272 single supply opamp and a 2N7000.

Thanks for any insights!
 
Is it just like the schematic or maybe the divider on the input isn't there?
 
Status
Not open for further replies.

Latest threads

New Articles From Microcontroller Tips

Back
Top