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**Urgent** Latch

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Reesy

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Hello All,


I'm looking for a circuit that latches it's output at logic '1' when a negative going pulse is inputted.

This circuit will be used to stop a counter when an object exits a optical sensor.

It should hold it's output high state until a reset button is pressed. (regardless of any further objects that enter/exit the sensor)

Can I use a flip flop for this?

If anyone can help, I would be very grateful.


Reesy
 
is this logic 1 a TTL compatible circuit..if so you could use a 74LS73 Flip flop yes..
the LS 73 will work correctly with a negetive going pulse on its clock input.. and a low pulsed to the clr input will reset it..just tie J input high ,and k input low..
 
how about 74LS00? you can add pull up resistors to both inputs
if you experience noise problems (2x 1k will do).
 

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panic mode said:
how about 74LS00? you can add pull up resistors to both inputs
if you experience noise problems (2x 1k will do).
Yeah, I was going to suggest that too. The only caveat is that the trigger input needs to be high when reset is applied. If the trigger is a level instead of a pulse, a differentiator would be needed on the trigger input. This is not necessary with the 74LS73.
 
How about this Circuit?
Input can be from 5v to 9v and the output is reverse of the input.
Add that to an SCR circuit and you have it.
 

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