Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Up/down counter 74193

Status
Not open for further replies.
you miss understood my post,, i am not asking about counter circuit !! i am saying i have 50Hz Clock and I need 1 HZ out using 74193 .. how to divide the 50Hz to minimize it to 1 Hz

hi,
Your thread Title says 'Up Down Counter'.??
You will need two 74193's to get a DIVIDE by 50.

Do you have any NAND or AND gate IC's you can use with the 74193's.?

Must you use 74193's or can you use 7490's.??
 
hi,
Your thread Title says 'Up Down Counter'.??
You will need two 74193's to get a DIVIDE by 50.

Do you have any NAND or AND gate IC's you can use with the 74193's.?




Must you use 74193's or can you use 7490's.??
yes i have NAND gates , but must use 74193 ... so the outpout from the AND gate that goes to MR is 1 Hz ??
 
Last edited:
yes i have NAND gates , but must use 74193 ... so the outpout from the AND gate that goes to MR is 1 Hz ??

OK,
The 74193 is a 4 stage Binary counter so that it divides by 16, what you need to do is divide the 50 by 10 in the first 74193, so thats 5 pulses/sec out and then divide the 5 pulses by 5 in the second 74193, that will give a 1 second pulse.

So the NAND gates are used to detect when the first 74193 has reached a count of 10,,, reset itself and clock the second 74193 on by one pulse.

In the second 74193 the NAND gates will have to detect when the count gets to 5,, reset itself and output a 1 second clock pulse.

Are you able to follow that explanation.?
 
OK,
The 74193 is a 4 stage Binary counter so that it divides by 16, what you need to do is divide the 50 by 10 in the first 74193, so thats 5 pulses/sec out and then divide the 5 pulses by 5 in the second 74193, that will give a 1 second pulse.

So the NAND gates are used to detect when the first 74193 has reached a count of 10,,, reset itself and clock the second 74193 on by one pulse.

In the second 74193 the NAND gates will have to detect when the count gets to 5,, reset itself and output a 1 second clock pulse.

Are you able to follow that explanation.?

ok ok i get it now, Thx a lot man :)
 
Hmmm, "must use 74193"? A Homework Assignment?? It can be done, but requires an awkward approach, and Exactly why it would Be a Homework (also why I won't tell you how).

A 74LS390 is an obvious 1 chip answer, but violates the "must" clause. So, if it's Not Homework, grab a 390 and move on... <<<)))
 
Last edited:
Hmmm, "must use 74193"? A Homework Assignment?? It can be done, but requires an awkward approach, and Exactly why it would Be a Homework (also why I won't tell you how).

A 74LS390 is an obvious 1 chip answer, but violates the "must" clause. So, if it's Not Homework, grab a 390 and move on... <<<)))

it is not homework man ! it is possible question in my Exam 2morow. Any way, Eric answered my question .. SO dont bother yoursellf :p
 
it is not homework man ! it is possible question in my Exam 2morow. Any way, Eric answered my question .. SO dont bother yoursellf :p

hi,
As it only a revision question, this a better solution.;)
 

Attachments

  • 74193Div1.gif
    74193Div1.gif
    61.2 KB · Views: 474
man i love your second solution,, it even made understand the parallel load Function.. ThQ. what is this program you used ?

hi,
Its LTspice , a free download, also a Yahoo user group online.
 
Status
Not open for further replies.

Latest threads

Back
Top