When power is removed from a TTL or a CMOS logic device, and the ground remains connected, do the outputs go to a logic 0 or do they go to a high impedance state? The reason why I ask is, I have a circuit with a microcontroller that uses a external rom.The address lines are multiplexed, when power is removed from the circuit, I want to be able to access the ROM through another microcontroller.Is it possible the unpowered multiplexer will hold some of the address lines(of the rom) at logic 0, causing a conflict with the added microcontroller?