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totem-pole output

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normad

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hey guys..

im working on a project creating a type-d amplifier powered by a single supply rail.. ive managed to get a PWM signal of the input with a DC offset of 7.5V. Now im stuck at the final stage where im supposed to use two transistors npn and pnp in a configuaration which i believe is called the totem poll configuration. can someone direct me to some article explaining how it works or be kind enough to explain it here..
and im also supposed to remove the dc offset from the output.

thanks in advance :)
 
Look at the internal schematics of IC OpAmps, Servo Amps, Audio Power Amps shown on their data sheets.
 
hehe i did try google before i posted here :p the reason i couldnt find a gud enough article was most of them were using mofsets insteads of bjts and i couldnt find any that explains its behaviour enough for me to apply it to an PWM signal with a dc offset..
 
Opposing NPN and PNP transistors form a push-pull stage, not a totem pole. A totem pole is an emitter follower "stacked on" a common emitter stage, with the inputs driven 180 degrees out of phase. They are typically seen in digital circuits, with TTL being the prime example.
 
because the projects specification says we have to use BJTs :( i think i understand how it works now.. in order to make it work with the 7.5V dc offset im keeping the emitter also at 7.5V. it works fine on simulation. would there be any problems practically? and in order to build this i need two transistors that can draw upto 1A. As for the npn 2n3019 seems appropriate but i couldn't find a complimenting pnp with the same collector current. Can someone suggest me 2 transistors? :)
thanks
 
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