janetsmith2000@yahoo.com
New Member
I wonder, do we have a tool to display timing diagram for our PIC simulation,
just like what we have when doing VHDL simulation. Tools like Aldec VHDL, Synopsys VCS and ModelSim provides timing diagram for the simulation result.
It would be handy for us to calculate the timing delay.
just like what we have when doing VHDL simulation. Tools like Aldec VHDL, Synopsys VCS and ModelSim provides timing diagram for the simulation result.
It would be handy for us to calculate the timing delay.