Timer0 need help

micropad · Dec 25, 2011

Dear All I am doubt with following problem. please help, My MCU is 16f877a

* if I set the Timer0 as counter mode, it is sync with internal clock later 2Tcy.

My questions are

If it sync with internal clock both pulse should be in phase. am I correct ?
Then both pulse should be same frequency. am I correct ?
If external clock sync with internal clock 2Tcy later, why we use external clock
can Timer0 register increment without support internal clock ( it dose not support sleep mode)
please help

Jon Wilder · Dec 25, 2011

Timer 0 can be incremented from 1 of 2 possible sources -

An external pulse on pin T0CKI (operates as a pulse counter in this mode)
The internal instruction clock (operates as a timer in this mode)

Bit T0CS in the OPTION_REG register sets the Timer 0 Clock Source. 1 = Pulse on T0CKI pin while 0 = Instruction Clock.

Bit T0SE in the OPTION_REG register sets the Timer 0 Source Edge when using T0CKI as the Timer 0 Clock Source. 1 = Increment on Rising Edge while 0 = Increment on Falling Edge. This bit is ignored when bit T0CS is set to use the internal instruction clock.

When using the external pulse on T0CKI, this does not mean that the signal present on T0CKI is at the same frequency as the internal instruction clock.

micropad · Dec 25, 2011

Jon Wilder said:
Timer 0 can be incremented from 1 of 2 possible sources -

An external pulse on pin T0CKI (operates as a pulse counter in this mode)
The internal instruction clock (operates as a timer in this mode)

Bit T0CS in the OPTION_REG register sets the Timer 0 Clock Source. 1 = Pulse on T0CKI pin while 0 = Instruction Clock.

Bit T0SE in the OPTION_REG register sets the Timer 0 Source Edge when using T0CKI as the Timer 0 Clock Source. 1 = Increment on Rising Edge while 0 = Increment on Falling Edge. This bit is ignored when bit T0CS is set to use the internal instruction clock.

When using the external pulse on T0CKI, this does not mean that the signal present on T0CKI is at the same frequency as the internal instruction clock.

Many many thanks for reply
Let me know the why External clock should sync with internal clock
please advice

Jon Wilder · Dec 25, 2011

micropad said:
Many many thanks for reply
Let me know the why External clock should sync with internal clock
please advice

Basically what it's saying is that you cannot use an external clock signal that is faster than the internal instruction clock. Other than that you need not worry about it.

micropad · Dec 25, 2011

Jon Wilder said:
Basically what it's saying is that you cannot use an external clock signal that is faster than the internal instruction clock. Other than that you need not worry about it.

Thank you very much for your advice
but if you can prove it in mathematically, I will be much appreciated

thanks in advance

be80be · Dec 25, 2011

Thank you very much for your advice
but if you can prove it in mathematically, I will be much appreciated

thanks in advance

Think of it like this

If car A is top speed is 50mph and car B is 100mph car A will never catch car B

micropad · Dec 26, 2011

be80be said:
Think of it like this

If car A is top speed is 50mph and car B is 100mph car A will never catch car B

Thanks for reply
Dear sir as per this example car a and car b out of the sync

Jon Wilder · Dec 26, 2011

Micropad...you're worrying about something you do not need to worry about. The "sync" process is what allows the PIC to know when the external pulse goes high and when it goes low, and it cannot go faster than the PIC's internal clock. This is all that is needed to be known.

The external clock must be high for AT LEAST 2 pulses of the instruction clock and it must be low for AT LEAST another 2 cycles of the instruction clock. This is the only requirement and is all that is needed to be known. Why are you continuing to press the issue any further than this???

gabeNC · Dec 26, 2011

because it's homework and he wants an equation.

Jon Wilder · Dec 26, 2011

Where in any of his posts does he state this?

micropad · Dec 28, 2011

How may I ignore the advice from expert like Jon wilder and gabeNC need help me to prove my question in mathematically
Dear sir, actually can we build the equation for this

be80be · Dec 28, 2011

mathematically I haven't seen any equation

The data sheets just say that the input has to lower then 2 clock cycles A = 100 B= 50 so B-A = 0 can't tell what -50 is so it's a 0

micropad · Dec 28, 2011

Thanks be80be

To sync of Tock1 with the internal phase clock is accomplished by sampling out put on Q2 and Q4 cycles of the internal phase clock

so 2Tosc high + 20ns RC Delay and 2Tosc low + 20ns Delay
so 4Tosc + 40ns delay

so if our fosc is 4MHz
4Tosc = 1us + 40 ns

Therefore every external clock pulse always Delay with 1us + 40ns = 1040ns
Therefore max frequency count by Timer0 without prescaler = 1/1040ns = 961KHz

my quection is: Does every external clock plus delay with 1040ns when use 4MHz Fosc

Timer0 need help

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