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TI IEPE Reference Design

Wak92

New Member
Hi,
i am trying to understand and develop my own simplified version of iepe signal conditioning circuit. however, i have been reading TIDUD62 and following TIDRRP9 documents and couldn't figure out few things as i am not an expert with Op-Amps. i have basic understanding of analog electronics and i know gains and attenuations.
coming to the point, i am struggling with page3 of TIDRRP9. after AC Coupling and level shifting with VCOM (at resistor end), signal is passed to the programmable gain amplifier. it states gain of 2,4,6,8. my first question is, how the gain of 2 is forming as the Ri is 2k and Rf is 2k it shouldn't be gain of 1. and what is the purpose of VCOM at the inverting pin of Op-Amp as its already level shifted at AC Coupling stage.
after that it goes through the FDA and there it gets VCOM again and a gain of 2. can someone please explain to me the signal chain as i am struggling to get through it.
thanks in advance.
files are attached
 

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  • TIDRRP9.PDF
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  • TIDUD62.PDF
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rjenkinsgb

Well-Known Member
Most Helpful Member
how the gain of 2 is forming as the Ri is 2k and Rf is 2k it shouldn't be gain of 1.

It's a single supply circuit; VCOM is half the voltage to give a reference that allows signals to be positive or negative of that.

It's frequently used in single supply opamp setups.


The U8 opamp is configured as non-inverting. The two equal feedback resistor halve the output voltage (relative to the no-signal VCOM level) so for the inverting input to match the non-inverting, the output must be twice the level.

Gain = 1 + (resistor ratio) rather than -(resistor ratio) for inverting.
 

Wak92

New Member
It's a single supply circuit; VCOM is half the voltage to give a reference that allows signals to be positive or negative of that.

It's frequently used in single supply opamp setups.


The U8 opamp is configured as non-inverting. The two equal feedback resistor halve the output voltage (relative to the no-signal VCOM level) so for the inverting input to match the non-inverting, the output must be twice the level.

Gain = 1 + (resistor ratio) rather than -(resistor ratio) for inverting.
thanks for your time now i know its gain of 2. one more thing i would like to ask is, in TIDUD62 at page number 12 and 13. it states about the voltage level of 1.65-V DC Common and it continues to quote this voltage level at several places. what is learnt from reading this document is, the ADC is differential and VREF for ADC is 2.5V.
that means VINP-VINN for ADC cannot go beyond 2.5V as its the Full Scale Range for the ADC.

the Highpass filter stage attenuates the signal lets say a (10V) signal to a (0.625V) with a gain of 1/16.
next is the programmable gain stage which will set the gain of 2 as minimum gain for this stage so the input signal of 0.625V will be amplified to 1.25V with DC shift of 2.5V (VCOM) the signal will be centered at 2.5V instead of 0V right? so 2.5V + 0.625V = 3.125V and 2.5 - 0.625 = 1.875V this is the signal after amplification.
next stage is FDA with +IP as the signal of previous gain stage (gain of 2) and -IP as VCOM (2.5V). also it amplifies the signal with the gain of 2 again. how after amplification the input to ADC will remain within its working input range of (2.5V).

thanks in advance as i am really trying to understand the ADC signal chain and what is the significance of 1.65-V DC Common as stated in document.
 

rjenkinsgb

Well-Known Member
Most Helpful Member
VCOM is half AVDD, which is 3.3V

The ADC will presumably accept a +/- 2.5V differential signal, which fully spans the supply voltage range as one input is fixed at VCOM.

The block diagrams show all the supply voltages; there is 25V for the current source and fault detect comparators, everything else is 3.3V

(To double check that, the ADC runs from AVDD and DVDD & the data sheet for that gives the AVDD supply limits as 2.7 to 3.6V, so it cannot be a 5V supply).
 

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