this is strange or i wasnt aware

[nero_xxx]

Take a look at this circuit.Guess what happens when input is in high impedence or tristated............the i/p of not gate(74ls04) actually drives the transistor to saturation.When i/p is tristated there is a voltage of about 1.7 volts at the i/pof the not and this voltage drives transistor to saturation.When we first look at the circuit,we may think that the transistor is in cutoff when i/p point is tristed(high impedence).the not gate works fine when driven by 0 or 1and even the transistor.the problem arises only when i/p is tristaed.what fix could i have if i want the circuit to inistialise with tranistor in cutoff and not to give 1 or tistated.is there some other family of not gates i cold use.

 

[Sebi]

Definitely need a resistor between the base and GND (2k2).

 

[nero_xxx]

what about the not

this might not work as far as the transistor is concered as the potential of not i/p still remains.and what abt notb o/p.

 

[Roff]

A design should never rely on a tristated gate to provide a valid logic level. Tristate buses should always be controlled by one of the devices on the bus. See the schematic of a 74LS04 below. The 18k resistor is the cause of your problem. If you need the transistor to be off, you'll need to provide a pulldown on the bus. You can connect a 1k resistor to GND from the TS input, or you can use the signal that controls your TS device to turn on another NPN which pulls the input to GND when it is supposed to be tristated.

 

[nero_xxx]

conforms with my idea

that is precisely what i had in my mind .give an alternate path for discharge instead of the emitter base of the transistor.i was thinking of 2.2k or 3.6k for pulldown.as 1k would cause a drive problem. the i/p i have shown connects to a pin of port c of 8255 which i think can source about 2.5 ma.if i were to put a 1k the app current for logic high wold be 5ma.but do u think 3.6k is too high a pulldown?
thanx

 

[Roff]

If you would use a 74HCT04 instead of a 74LS04, you could use a resistor as high as 100k for your TS pulldown. 3.6k may be too big for the 74LS04.

 

[nero_xxx]

what would be the potential

it is important that after pull down the potential at the i/p of "not gate" be less then vbe.else trans will saturate again.so exceddingly high vale of resistor will not pull down enuff

 

[Roff]

Re: what would be the potential

it is important that after pull down the potential at the i/p of "not gate" be less then vbe.else trans will saturate again.so exceddingly high vale of resistor will not pull down enuff

74HCT04 is a CMOS part. It draws zero input current, and so can be pulled down (or up) with high-valued resistors. 100k is a common value for this purpose.

 

[nero_xxx]

thanx man

thanx.think i'll try 74hc04..i dont need to make any changes to my circuit.........i mean Vcc the same as LS........and pinout...right?.Simulated the circuit....works fine...keeps a low even with 100k

 

[Roff]

Re: thanx man

thanx.think i'll try 74hc04..i dont need to make any changes to my circuit.........i mean Vcc the same as LS........and pinout...right?.Simulated the circuit....works fine...keeps a low even with 100k

The 74HC04 has CMOS input logic thresholds. The 74HCT04 has TTL logic thresholds. You need to keep this in mind when selecting which one you use to replace the 74LS04. It will depend on what is driving the TS node in question. Look for VIH and VOL in the logic family specifications.